Method for detection of short circuits within an energy storage device
US-10365312-B2 · Jul 30, 2019 · US
US2018328998A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2018328998-A1 |
| Application number | US-201715843406-A |
| Country | US |
| Kind code | A1 |
| Filing date | Dec 15, 2017 |
| Priority date | May 11, 2017 |
| Publication date | Nov 15, 2018 |
| Grant date | — |
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Disclosed examples include systems and methods for determining an internal short condition in a battery. The method includes computing an estimated current value based on a measured battery voltage, a measured battery current, a measured battery temperature, and a model of the battery that includes steady state characteristics of the battery and transient characteristics of the battery. The method further includes computing an internal short current value according to the measured battery current and the estimated current value, and determining if a battery short condition exists according to the internal short current value.
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The following is claimed: 1 . A method of determining an internal short condition in a battery, comprising: computing an estimated current value based on a measured battery voltage, a measured battery current, a measured battery temperature, and a model of the battery that includes steady state characteristics of the battery and transient characteristics of the battery; computing an internal short current value according to the measured battery current, and the estimated current value; and determining if a battery short condition exists according to the internal short current value. 2 . The method of claim 1 , further comprising: computing a depth of discharge (DOD) of the battery according to the measured battery voltage, the measured battery current, the measured battery temperature, and the model. 3 . The method of claim 1 , further comprising: computing the estimated current value for each of a plurality of different sample times; computing the internal short current value for each of the sample times; computing a first linear regression according to a first integer number J of the internal short current values to determine a first regression average value and a first regression deviation value, J being greater than 1; computing a second linear regression according to a second integer number K of the internal short current values to determine a second regression average value and a second regression deviation value, K being greater than J; and computing a first upper error margin value and a first lower error margin value according to the first regression deviation value; computing a second upper error margin value and a second lower error margin value according to the second regression deviation value; determining a short condition status value according to the first upper error margin value, the first lower error margin value, the second upper error margin value and the second lower error margin value. 4 . The method of claim 3 , further comprising: computing the first upper error margin value and the second upper error margin value according to a variance error, and a gain_error; computing the first lower error margin value and the second lower error margin value according to the variance error, and the gain_error. 5 . The method of claim 4 , further comprising: computing the first upper error margin value and the second upper error margin value according to an offset error; and computing the first lower error margin value and the second lower error margin value according to the offset error. 6 . The method of claim 5 , further comprising: computing the first upper error margin value and the second upper error margin value according to a first transient error; and computing the first lower error margin value and the second lower error margin value according to a second transient error. 7 . The method of claim 3 , further comprising: in response to either the first upper error margin value or the second upper error margin value being less than a first threshold, incrementing a low fault counter; and in response to the low fault counter being greater than a first predetermined number, setting the short condition status value to a first value which indicates that no battery short condition exists. 8 . The method of claim 7 , further comprising: in response to either the second lower error margin value or the first lower error margin value being greater than the first threshold, setting the low fault counter equal to zero. 9 . The method of claim 3 , further comprising: in response to either the first upper error margin value being less than a second threshold or the first upper error margin value being less than the first threshold, incrementing a high fault counter; and in response to the high fault counter being greater than a second predetermined number, setting the short condition status value to a second value which indicates that a battery short condition exists. 10 . The method of claim 9 , further comprising: in response to the either the second lower error margin value or the first lower error margin value being lower than the second threshold, setting the high fault counter equal to zero. 11 . The method of claim 1 , further comprising: in response to determining that the battery short condition exists, with a battery disconnect switch, disconnecting the battery. 12 . The method of claim 1 , further comprising: in response to determining that the battery short condition exists, generating (130) a message indicating that the battery short condition exists, and delivering the message that the battery short condition exists to a host. 13 . An integrated circuit (IC) for determining an internal short condition in a battery, comprising: a memory configured to store a model of the battery that includes steady state characteristics of the battery and transient characteristics of the battery; and a processor including a first input configured to receive a measured battery voltage, a second input configured to receive a measured battery current, and a third input configured to receive a measure battery temperature, the processor configured to: compute an estimated current value based on the measured battery voltage, a measured battery current, the measured battery temperature, and the model of the battery that includes the steady state characteristics of the battery and the transient characteristics of the battery; compute an internal short current value according to the measured battery current, and the estimated current value; and determine if a battery short condition exists according to the internal short current value. 14 . The IC of claim 13 , wherein the processor is further configured to: compute the estimated current value for each of a plurality of different sample times; compute the internal short current value for each of the sample times; compute a first linear regression according to a first integer number J of the internal short current values to determine a first regression average value and a first regression deviation value, J being greater than 1; compute a second linear regression according to a second integer number K of the internal short current values to determine a second regression average value and a second regression deviation value, K being greater than J; and compute a first upper error margin value and a first lower error margin value according to the first regression deviation value; compute a second upper error margin value and a second lower error margin value according to the second regression deviation value; determine a short condition status value according to the first upper error margin value, the first lower error margin value, the second upper error margin value and the second lower error margin value. 15 . The IC of claim 14 , wherein the processor is further configured to: compute the first upper error margin value and the second upper error margin value according to a first transient error; and compute the first lower error margin value and the second lower error margin value according to a second transient error. 16 . The IC of claim 14 , wherein the processor is further configured to: in response to either the first upper error margin value or the second upper error margin value being less than a first threshold, increment a low fault counter; and in response to the low fault counter being greater than a first predetermined number, set the short condition status value to a first value which indicates that no battery short condition exists.
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells (H01M10/60 takes precedence) · CPC title
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