Method for recovering basic input/output system image file of a computer system and the computer system

Patent metadata

Field	Value
Publication number	US-2018322013-A1
Application number	US-201815971118-A
Country	US
Kind code	A1
Filing date	May 4, 2018
Priority date	May 5, 2017
Publication date	Nov 8, 2018
Grant date	—

Abstract

A method for recovering a basic input/output system (BIOS) image file of a computer system is provided. The method includes steps of: controlling a switch unit of the computer system to switch from a first state to a second state when the BIOS image file is to be updated; reading a current BIOS image file so as to store the same as a backup; controlling the switch unit to switch back to the first state; determining whether a command is received within a first predetermined time period when the BIOS image file is successfully updated to a new version of the BIOS image file; and when negative, controlling the switch unit to switch to the second state and writing the backup of the current version of the BIOS image file.

First claim

What is claimed is:

1 . A method for recovering a basic input/output system (BIOS) image file of a computer system, the computer system including a flash memory for storing a current version of the BIOS image file, a processor, a baseboard management controller (BMC), a control chipset electrically connected between the processor and the BMC, and a switch unit electrically connected among the flash memory, the control chipset and the BMC, the method comprising steps of:
when the BIOS image file is to be updated, outputting, by the processor, a first command to be received by the BMC via the control chipset; upon receipt of the first command, controlling, by the BMC, the switch unit to switch from a first state to a second state, the switch unit being in the first state by default and electrically connecting the flash memory and the control chipset and electrically disconnecting the flash memory from the BMC in the first state, the switch unit electrically connecting the flash memory and the BMC and electrically disconnecting the flash memory from the control chipset in the second state; reading, by the BMC, the current version of the BIOS image file from the flash memory so as to store the same in the BMC as a backup; after the current version of the BIOS image file is stored in the BMC, controlling, by the BMC, the switch unit to switch from the second state to the first state; determining, by the BMC, whether a second command that is outputted by the processor when the BIOS image file stored in the flash memory is successfully updated to a new version of the BIOS image file is received within a first predetermined time period; and when it is determined that the second command is not received within the first predetermined time period, controlling, by the BMC, the switch unit to switch from the first state to the second state and writing the current version of the BIOS image file stored therein into the flash memory.

2 . The method as claimed in claim 1 , further comprising steps of:
when the BIOS image file stored in the flash memory is successfully updated to the new version of the BIOS image file, rebooting, by the processor, the computer system with the new version of the BIOS image file read from the flash memory via the control chipset; determining, by the BMC, whether a third command that is outputted by the processor when the computer system is successfully rebooted is received within a second predetermined time period; when it is determined that the third command is not received within the second predetermined time period, by the BMC, controlling the switch unit to switch from the first state to the second state and writing the current version of the BIOS image file stored therein into the flash memory.

3 . The method as claimed in claim 1 , the control chipset including a general purpose input output (GPIO) pin electrically connected to the processor, wherein the method further comprises a step of:
after the step of controlling the switch unit to switch from the second state to the first state, changing, by the BMC, an electric potential at the GPIO pin so as to notify the processor that the current version of the BIOS image file has been stored in the BMC.

4 . The method as claimed in claim 3 , further comprising a step of:
controlling, by the processor, the control chipset to read the new version of the BIOS image file from a storage device that is electrically connected the control chipset and to store the new version of the BIOS image file in the flash memory to overwrite the current version of the BIOS image file when the processor detects a change in the electric potential at the GPIO pin.

5 . The method as claimed in claim 1 , wherein the BIOS image file includes a first segment having program codes for booting up the computer system, and a second segment having data related to configuration of the computer system.

6 . A method for recovering a basic input/output system (BIOS) image file of a computer system, the computer system communicating with a remote server that stores a new version of the BIOS image file via a communication network, and including a flash memory for storing a current version of the BIOS image file, a processor, a baseboard management controller (BMC), a control chipset electrically connected between the processor and the BMC, and a switch unit electrically connected among the flash memory, the control chipset and the BMC, the method comprising steps of:
when the BIOS image data of the computer system is to be updated, controlling, by the BMC, the switch unit to switch from a first state to a second state, the switch unit being in the first state by default and electrically connecting the flash memory and the control chipset and electrically disconnecting the flash memory from the BMC in the first state, the switch unit electrically connecting the flash memory and the BMC and electrically disconnecting the flash memory from the control chipset in the second state; reading, by the BMC, the current version of the BIOS image file from the flash memory so as to store the same in the BMC as a backup; reading, by the BMC, the new version of the BIOS image file from the remote server so as to store the new version of the BIOS image file in the flash memory to overwrite the current version of the BIOS image file; determining, by the BMC, whether the BIOS image file stored in the flash memory is successfully updated to the new version of the BIOS image file; and when it is determined that the BIOS image file stored in the flash memory is not successfully updated, writing, by the BMC, the current version of the BIOS image file stored therein into the flash memory.

7 . The method as claimed in claim 6 , the control chipset including a general purpose input output (GPIO) pin electrically connected to the processor, wherein the method further comprises a step, between the step of reading the current version of the BIOS image file and the step of reading the new version of the BIOS image file, of:
changing, by the BMC, an electric potential at the GPIO pin so as to notify the processor that the current version of the BIOS image has been stored in the BMC.

8 . The method as claimed in claim 7 , further comprising a step of:
controlling, by the processor, the control chipset to notify the BMC to implement the step of reading the new version of the BIOS image file from the remote server when the processor detects a change in the electric potential at the GPIO

9 . The method as claimed in claim 6 , the method further comprising steps of:
when it is determined that the BIOS image file stored in the flash memory is successfully updated to the new version of the BIOS image file, controlling, by the BMC, the switch unit to switch from the second state to the first state; rebooting, by the processor, the computer system with the new version of the BIOS image file read from the flash memory via the control chipset; determining, by the BMC, whether a command that is outputted by the processor when the computer system is successfully rebooted is received within a predetermined time period; and when it is determined that the command is not received within the predetermined time period, by the BMC, controlling the switch unit to switch from the first state to the second state and writing the current version of the BIOS image file stored therein into the flash memory.

10 . A computer system comprising:
a flash memory storing a current version of a basic input/output system (BIOS) image file of said computer system; a control chipset configured to be electrically connected to a storage device that stores a new version of the BIOS image file; a processor electrically

Assignees

• Mitac Computing Tech Corp

Inventors

• Yang Shun-Chieh

Classifications

• G06F11/1417 Primary

  Boot up procedures · CPC title

• G06F8/654

  using techniques specially adapted for alterable solid state memories, e.g. for EEPROM or flash memories · CPC title

• G06F11/1433

  during software upgrading · CPC title

• G06F9/4403 Primary

  Processor initialisation · CPC title