Adaptive hardware configuration for data analytics

Patent metadata

Field	Value
Publication number	US-2018314533-A1
Application number	US-201715581219-A
Country	US
Kind code	A1
Filing date	Apr 28, 2017
Priority date	Apr 28, 2017
Publication date	Nov 1, 2018
Grant date	—

Abstract

A computer-implemented method uses a predictive time-sequence model to adapt hardware configurations at run-time for an application including multiple stages of execution. At each stage a system monitor is started at the launch of a first task in a first run to collect performance data. The system monitor is stopped at the completion of a last task in the first run, then a predictive optimal configuration is computed and applied to the remaining runs in the stage.

First claim

What is claimed is:

1 . A computer-implemented method for improving performance of applications by adapting a hardware configuration at run-time, the computer-implemented method comprising:
receiving as input to a predictive time-sequence model, a run-time configuration for an application comprising multiple stages of execution, each stage comprising a plurality of runs of parallel tasks run by executor nodes; and for each stage:
starting a system monitor at launch of a first task in a first run, wherein the system monitor collects performance data on hardware and software events using a performance monitoring tool;
stopping the system monitor upon completion of a last task in the first run;
obtaining a performance vector of hardware and software events from the system monitor;
using prediction models, computing a predictive optimal configuration for remaining runs in the stage as a function of the run-time configuration and the performance vector;
applying the predictive optimal configuration to dynamically adjust the run-time configuration for the remaining runs in the stage; and
storing parameters for the predictive optimal configuration in a repository.

2 . The computer-implemented method of claim 1 wherein receiving the run-time configuration comprises receiving hardware metrics for simultaneous multi-threading and hardware prefetch within a cluster computing framework.

3 . The computer-implemented method of claim 1 further comprising:
using training applications previously run on a sampling of hardware configurations, building the prediction models with machine learning algorithms and statistics from hardware performance counters.

4 . The computer-implemented method of claim 3 wherein building the prediction models comprises:
applying performance vectors to the training applications with a plurality of hardware configurations to determine the hardware configuration that yields a fastest processing time; and
using a machine learning algorithm, establishing the hardware configuration that yields a fastest processing time as a benchmark.

5 . The computer-implemented method of claim 1 further comprising inserting a first hook function at a scheduler node of a software stack on which the application is run to identify an executor node registered to run the first task.

6 . The computer-implemented method of claim 5 further comprising:
once the executor node registered to run the first task is identified, inserting a second hook function for starting the system monitor in a background layer of the executor node; and
as executor nodes for remaining tasks are identified, inserting a third hook function for stopping the system monitor.

7 . The computer-implemented method of claim 1 wherein applying the predictive optimal configuration to dynamically adjust the run-time configuration comprises binding an executor node to a processor core.

8 . The computer-implemented method of claim 7 further comprising maintaining high-performing executor nodes while shutting down lower-performing executor nodes.

9 . The computer-implemented method of claim 1 wherein the predictive time-sequence model is based on a limited state machine.

10 . An information processing system for improving performance of applications by adapting a hardware configuration, comprising:
a processor device; and a memory operably coupled with the processor device and storing computer-executable instructions causing a computer to perform:
receiving as input to a predictive time-sequence model, a run-time configuration for an application comprising multiple stages of execution, each stage comprising a plurality of runs of parallel tasks run by executor nodes; and
for each stage:
starting a system monitor at launch of a first task in a first run, wherein the system monitor collects performance data on hardware and software events using a performance monitoring tool;
stopping the system monitor upon completion of a last task in the first run;
obtaining a performance vector of hardware and software events from the system monitor;
using prediction models, computing a predictive optimal configuration for remaining runs in the stage as a function of the run-time configuration and the performance vector;
applying the predictive optimal configuration to dynamically adjust the run-time configuration for the remaining runs in the stage; and
storing parameters for the predictive optimal configuration in a repository.

11 . The information processing system of claim 10 wherein the run-time configuration comprises hardware metrics for simultaneous multi-threading and hardware prefetch within a cluster computing framework.

12 . The information processing system of claim 10 wherein the prediction models are built with machine learning algorithms and statistics from hardware performance counters using training applications previously run on a sampling of hardware configurations.

13 . The information processing system of claim 12 further comprising:
performance vectors applied to the training applications across a plurality of hardware configurations to determine the hardware configuration that yields a fastest processing time; and
a machine learning algorithm used to establish the hardware configuration that yields the fastest processing time as a benchmark.

14 . The information processing system of claim 10 further comprising:
a first hook function inserted at a scheduler node of the application to identify an executor node registered to run the first task.

15 . The information processing system of claim 14 further comprising:
a second hook function for starting the system monitor, the second hook function inserted in a background layer of the executor node once the executor node registered to run the first task is identified; and
a third hook function for stopping the system monitor, the third hook function inserted once the executor nodes for remaining tasks are identified.

16 . The information processing system of claim 15 wherein the computer-executable instructions further cause the computer to perform maintaining high-performing executor nodes while shutting down lower-performing executor nodes.

17 . The information processing system of claim 10 wherein applying the predictive optimal configuration to dynamically adjust the run-time configuration comprises binding an executor node to a processor core.

18 . The information processing system of claim 10 wherein the predictive time-sequence model is based on a limited state machine.

19 . A computer program product for improving performance of applications by adapting a hardware configuration at run-time, the computer program product comprising:
a non-transitory computer readable storage medium readable by a processing device and storing instructions for execution by the processing device for performing a method comprising: receiving as input to a predictive time-sequence model, a run-time configuration for an application comprising multiple stages of execution, each stage comprising a plurality of runs of parallel tasks run by executor nodes; and for each stage:
starting a system monitor at launch of a first task in a first run, wherein the system monitor collects performance data on hardware and software events using a performance monitoring tool;
stopping the system monitor upon completion of a last task in the first run;
obtaining a performance vector of hardware and software events from the system monitor;
using prediction models, computing

Assignees

• IBM

Inventors

• Azhen J I
• Ge Yi
• Lin Yong Hua
• Xue Chao
• Yan Rong

Classifications

• G06N5/01

  Dynamic search techniques; Heuristics; Dynamic trees; Branch-and-bound · CPC title

• H04L41/145

  involving simulating, designing, planning or modelling of a network · CPC title

• G06N20/00

  Machine learning · CPC title

• G06F11/3428

  Benchmarking · CPC title

• H04L67/10

  in which an application is distributed across nodes in the network (software deployment G06F8/60; multiprogramming arrangements G06F9/46) · CPC title