Display board, display device, and method of producing display board

US2018314099A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2018314099-A1
Application numberUS-201615772086-A
CountryUS
Kind codeA1
Filing dateNov 1, 2016
Priority dateNov 6, 2015
Publication dateNov 1, 2018
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An array board includes a glass substrate, input terminals, a gate insulating film including a gate insulating film edge section, a first interlayer insulating film including a first interlayer insulating film edge section, a first planarization film, and terminal lines. At least parts of the gate insulating film edge section and the first interlayer insulating film edge section are angled relative to a plate surface of the glass substrate with an angle of slope equal to or smaller than 35°. The first planarization film includes a first planarization film edge section angled relative to the plate surface with an angle of slope smaller than the angle of slope of the gate insulating film edge section. The terminal lines are disposed to cross the gate insulating film edge section, the first interlayer insulating film edge section, and the first planarization film edge section and connected to the input terminals.

First claim

Opening claim text (preview).

1 . A display board comprising: a board including a display area in which an image can be displayed and a non-display area disposed outside the display area to surround the display area; a plurality of terminals disposed in the non-display area; a first insulating film disposed to cross a boundary between the display area and the non-display area and including a first insulating film edge section disposed between the plurality of terminals and the display area, the first insulating film edge section being an edge section of the first insulating film and angled relative to a plate surface of the board with an angle of slope of at least a part of the first insulating film edge section equal to or smaller than 35°; a second insulating film disposed in a layer upper than the first insulating film to cross the boundary between the display area and the non-display area and including a second insulating film edge section disposed between the plurality of terminals and the display area, the second insulating film edge section being an edge section of the second insulating film and angled relative to the plate surface of the board with an angle of slope smaller than the angle of slope of the first insulating film edge section; and a plurality of terminal lines disposed in a layer upper than the second insulating film at least in the non-display area, the plurality of terminal lines being formed from a metal film, disposed to cross the first insulating film edge section and the second insulating film edge section, and connected to the plurality of terminals. 2 . The display board according to claim 1 , wherein the second insulating film includes a first thickness portion and a second thickness portion with a thickness smaller than a thickness of the first thickness portion, the second thickness portion being disposed closer to the plurality of terminal relative to the first thickness portion and including the second insulating film edge section. 3 . The display board according to claim 1 , wherein the angle of slope of the first insulating film edge section of the first insulating film relative to the plate surface of the board is equal to or smaller than 35° for an entire area. 4 . The display board according to claim 1 , wherein the first insulating film includes a projection at the first insulating film edge section, the projection is disposed between the adjacent terminal lines to project toward the plurality of terminals, and At least the projection at the first insulating film edge section is angled relative to the plate surface of the board with an angle of slope equal to or smaller than 35°. 5 . The display board according to claim 4 , wherein the projection has a dimension between a base of projection and a distal end defined such that a ratio calculated by dividing the dimension by a thickness of the second insulating film edge section is equal to or smaller than 0.2. 6 . A display device comprising: the display board according to claim 1 ; and a common board disposed opposite the display board. 7 . A method of producing a display board comprising at least: a first insulating film forming process including forming a first insulating film on a board including a display area in which an image can be displayed, a non-display area disposed outside the display area to surround the display area, and a plurality of terminals disposed in the non-display area to cross a boundary between the display area and the non-display area; a second insulating film forming process including forming a second insulating film in a layer upper than the first insulating film to cross the boundary between the display area and the non-display area; a second insulating film shaping process including shaping the second insulating film such that a second insulating film edge section that is an edge section of the second insulating film is angled relative to a plate surface of the board between the plurality of terminals and the display area; a first insulating film shaping process including etching the first insulating film via the second insulating film such that a first insulating film edge section that is an edge section of the first insulating film is angled relative to the plate surface of the board with an angle of slope of at least a part of the first insulating film edge section larger than the angle of slope of the second insulating film edge section and equal to or smaller than 35° between the plurality of terminals and the display area; a metal film forming process including forming a metal film in a layer upper than the second insulating film to cross the boundary between the display area and the non-display area; a resist forming process including forming a resist in a layer upper than the metal film; and a terminal line forming process including etching the metal film via the resist to form a plurality of terminal lines such that the plurality of terminal lines are disposed to cross the first insulating film edge section and the second insulating film edge section and connected to the plurality of terminals. 8 . The method of producing a display board according to claim 7 , wherein the second insulating film forming process includes forming the second insulating film using a photosensitive material, and the second insulating film shaping process includes at least: an exposing step including exposing the second insulating film using a halftone mask or a grey tone mask including a transmissive area and a semitransmissive area as a photomask, the halftone mask or the grey tone mask being positioned such that at least the semitransmissive area overlaps a section of the second insulating film at which the second insulating film edge section is to be formed; and a developing step includes developing the second insulating film.

Assignees

Inventors

Classifications

  • characterised by their geometrical arrangement · CPC title

  • pixel · CPC title

  • Input devices, e.g. touch panels · CPC title

  • Wiring, e.g. gate line, drain line · CPC title

  • Light shielding layers, e.g. black matrix (G02F1/136209 takes precedence) · CPC title

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What does patent US2018314099A1 cover?
An array board includes a glass substrate, input terminals, a gate insulating film including a gate insulating film edge section, a first interlayer insulating film including a first interlayer insulating film edge section, a first planarization film, and terminal lines. At least parts of the gate insulating film edge section and the first interlayer insulating film edge section are angled rela…
Who is the assignee on this patent?
Sharp Kk
What technology area does this patent fall under?
Primary CPC classification G02F1/13452. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Nov 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).