Thin film transistor, display substrate, display device, and manufacturing methods thereof

Patent metadata

Field	Value
Publication number	US-2018308931-A1
Application number	US-201715820732-A
Country	US
Kind code	A1
Filing date	Nov 22, 2017
Priority date	Apr 25, 2017
Publication date	Oct 25, 2018
Grant date	—

Abstract

The present disclosure provides in some embodiments a thin film transistor, a display substrate, a display device and manufacturing methods thereof. The method for manufacturing the thin film transistor includes: forming an active layer having a first groove structure and a second groove structure, the first groove structure and the second groove structure being separated from each other; and depositing a conductive layer into the first groove structure and the second groove structure to form a first electrode and a second electrode of the thin film transistor.

First claim

What is claimed is:

1 . A method for manufacturing a thin film transistor, comprising:
forming an active layer having a first groove structure and a second groove structure, the first groove structure and the second groove structure being separated from each other; and depositing a conductive material into the first groove structure and the second groove structure to form a first electrode and a second electrode of the thin film transistor.

2 . The method according to claim 1 , wherein the step of forming the active layer having the first groove structure and the second groove structure comprises: depositing a semiconductor material layer; applying a photoresist onto the semiconductor material layer; exposing and developing the photoresist with a mask plate to form a photoresist partially-reserved region corresponding to the first groove structure and the second groove structure, a photoresist fully-reserved region corresponding to a region of the active layer other than the first groove structure and the second groove structure, and a photoresist unreserved region corresponding to a region other than a pattern of the active layer; etching the semiconductor material layer at the photoresist unreserved region; ashing the photoresist at the photoresist partially-reserved region, and etching the semiconductor material layer at the photoresist partially-reserved region to form the first groove structure and the second groove structure; and ashing the photoresist at the photoresist fully-reserved region.

3 . The method according to claim 2 , wherein a third groove structure is further arranged at a region corresponding to the photoresist partially-reserved region, and the method further comprises forming the third groove structure between the first groove structure and the second groove structure while forming the first groove structure and the second groove structure, the third groove structure being separated from the first groove structure and the second groove structure.

4 . The method according to claim 1 , wherein the step of depositing the conductive material into the first groove structure and the second groove structure comprises spraying a metallic nanomaterial solution into the first groove structure and the second groove structure through ink-jet printing to form the first electrode at least partially within the first groove structure and the second electrode at least partially within the second groove structure.

5 . The method according to claim 4 , wherein the metallic nanomaterial solution comprises nanoparticles made of one or more selected from the group of Cu, Al, Ag, Mo, Cr, Nd, Ni, Mn, Ti, Ta and W.

6 . The method according to claim 1 , wherein prior to the step of forming the active layer having the first groove structure and the second groove structure, the method further comprises forming a gate electrode and a gate insulation layer on a base substrate, and the active layer is formed on the gate insulation layer.

7 . The method according to claim 1 , wherein the first groove structure and the second groove structure are depressed in an identical direction and toward a base substrate of the thin film transistor.

8 . A thin film transistor, comprising:
an active layer having a first groove structure and a second groove structure, the first groove structure and the second groove structure being separated from each other; and a first electrode at least partially within the first groove structure and a second electrode at least partially within the second groove structure.

9 . The TFT according to claim 8 , wherein the active layer further comprises a third groove structure arranged between, and separated from, the first groove structure and the second groove structure.

10 . A method for manufacturing a display substrate, comprising a method for manufacturing a thin film transistor, wherein the method for manufacturing a thin film transistor comprising:
forming an active layer having a first groove structure and a second groove structure, the first groove structure and the second groove structure being separated from each other; and depositing a conductive material into the first groove structure and the second groove structure to form a first electrode and a second electrode of the thin film transistor.

11 . A display substrate comprising the thin film transistor according to claim 8 .

12 . A display device comprising the display substrate according to claim 11 .

Assignees

• Boe Technology Group Co Ltd
• Hefei Boe Optoelectronics Tech

Inventors

• Li Hefei
• Duan Xianxue
• Wang Chengcheng
• Liu Tianzhen

Classifications

• H10D64/011

  of electrodes ohmically coupled to a semiconductor · CPC title

• H01L27/156

  Electricity · mapped topic

• H01L29/0657 Primary

  Electricity · mapped topic

• H01L29/43

  Electricity · mapped topic

• B82Y30/00

  Nanotechnology for materials or surface science, e.g. nanocomposites · CPC title