Power semiconductor device and snubber circuit thereof

Patent metadata

Field	Value
Publication number	US-2018287487-A1
Application number	US-201815903710-A
Country	US
Kind code	A1
Filing date	Feb 23, 2018
Priority date	Mar 31, 2017
Publication date	Oct 4, 2018
Grant date	—

Abstract

The present disclosure relates to a snubber circuit which comprises a static snubber unit, connected in parallel with the switch, for balancing a static voltage sharing across a switch when the switch is in a state of turn-on or turn-off; and a dynamic snubber unit for balance a dynamic voltage sharing across the switch when the switch is in a process of turn-on or turn-off, comprising a dynamic voltage sharing capacitor connected in parallel with the switch and having a relationship between a capacitance and a voltage of the dynamic voltage sharing capacitor; and a controller for controlling the capacitance of the dynamic voltage sharing capacitor to be in a predetermined working area of capacitance rising while the voltage across the switch is increasing. The present disclosure also relates to a power semiconductor device.

First claim

What is claimed is:

1 . A snubber circuit for a switch, comprising:
a static snubber unit, connected in parallel with the switch, for balancing a static voltage sharing across the switch when the switch is in a state of turn-on or turn-off; and a dynamic snubber unit for balance a dynamic voltage sharing across the switch when the switch is in a process of turn-on or turn-off, comprising:
a dynamic voltage sharing capacitor connected in parallel with the switch and having a relationship between a capacitance and a voltage of the dynamic voltage sharing capacitor; and
a controller for controlling the capacitance of the dynamic voltage sharing capacitor to be in a predetermined working area of capacitance rising while the voltage across the switch is increasing.

2 . The snubber circuit of claim 1 , wherein the dynamic voltage sharing capacitor is controlled to operate in a range of 0 nF to 100 nF.

3 . The snubber circuit of claim 1 , wherein the controller comprises:
a receiver for receiving a voltage across the switch; a calculator for determining the capacitance of the dynamic voltage sharing capacitor based on the received voltage across the switch from the relationship between the capacitance and the voltage of the dynamic voltage sharing capacitor; and a regulator for regulating a gate driving signal provided to the switch so that the capacitance of the dynamic voltage sharing capacitor is in the predetermined working area when the determined capacitance of the dynamic voltage sharing capacitor exceeds the predetermined working area.

4 . The snubber circuit of claim 1 , wherein the dynamic snubber unit further comprises:
a damping resistor, connected in series with the dynamic voltage sharing capacitor, for damping current oscillations across the switch.

5 . The snubber circuit of claim 1 , wherein the static snubber unit comprises at least one static voltage sharing resistor.

6 . A power semiconductor device, comprising:
at least two series-connected switches; and at least two snubber circuits, wherein each of the at least two snubber circuits is connected in parallel with one of the at least two series-connected switches and each of the at least two snubber circuits comprises: a static snubber unit, connected in parallel with the switch, for balancing a static voltage sharing across the switch when the switch is in a state of turn-on or turn-off; and a dynamic snubber unit for balance a dynamic voltage sharing across the switch when the switch is in a process of turn-on or turn-off, comprising:
a dynamic voltage sharing capacitor connected in parallel with the switch and having a relationship between a capacitance and a voltage of the dynamic voltage sharing capacitor; and
a controller for controlling the capacitance of the dynamic voltage sharing capacitor to be in a predetermined working area of capacitance rising while the voltage across the switch is increasing.

7 . The power semiconductor device of claim 6 , wherein the dynamic voltage sharing capacitor is controlled to operate in a range of 0 nF to 100 nF.

8 . The power semiconductor device of claim 6 , wherein the controller comprises:
a receiver for receiving a voltage across the switch; a calculator for determining the capacitance of the dynamic voltage sharing capacitor based on the received voltage across the switch; and a regulator for regulating a gate drive signal provided to the switch when the determined capacitance of the dynamic voltage sharing capacitor exceeds the predetermined working area.

9 . The power semiconductor device of claim 6 , wherein the dynamic snubber unit further comprises:
a damping resistor, connected in series with the dynamic voltage sharing capacitor, for damping current oscillations across the switch.

10 . The power semiconductor device of claim 6 , wherein the static snubber unit comprises at least one static voltage sharing resistor.

Assignees

• Gen Electric

Inventors

• Mao Saijun
• Schroeder Stefan
• Shi Jingkui
• Xu He
• Mechlinski Marius Michael
• Qu Bo
• Yuan Zhihui
• Zhang Yingqi
• Shen Jie

Classifications

• H03K17/72

  having more than two PN junctions; having more than three electrodes; having more than one electrode connected to the same conductivity region · CPC title

• H03K17/567

  Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT · CPC title

• H03K17/102

  in field-effect transistor switches · CPC title

• H02M1/34 Primary

  Snubber circuits · CPC title

• H03K17/08142 Primary

  in field-effect transistor switches · CPC title