Load drive circuit, light emitting diode driver, and display device
US-2024397595-A1 · Nov 28, 2024 · US
US2018286331A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2018286331-A1 |
| Application number | US-201715526732-A |
| Country | US |
| Kind code | A1 |
| Filing date | Mar 18, 2017 |
| Priority date | Feb 27, 2017 |
| Publication date | Oct 4, 2018 |
| Grant date | — |
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Provided is a driving method of a liquid crystal display panel, comprising: inputting an activation voltage to the scan lines from a first direction in a first duration, and inputting a pixel voltage of a first polarity to the data lines to charge the pixel capacitors; inputting an activation voltage to the scan lines from the first direction in a second duration, and inputting a pixel voltage of a second polarity to the data lines to charge the pixel capacitors; inputting an activation voltage to the scan lines from a second direction in a third duration, and inputting the pixel voltage of the first polarity to the data lines to charge the pixel capacitors; inputting an activation voltage to the scan lines from the second direction in a fourth duration, and inputting the pixel voltage of the second polarity to the data lines to charge the pixel capacitors.
Opening claim text (preview).
What is claimed is: 1 . A driving method of a liquid crystal display panel, and the liquid crystal display panel comprising a gate driver, N scan lines, a source driver, M data lines, a plurality of pixel capacitors, wherein N, M≥2, wherein the driving method comprises: the gate driver inputting an activation voltage to the scan lines line by line from a first direction in a first duration, and the source driver inputting a pixel voltage of a first polarity to the data lines to charge the pixel capacitors; the gate driver inputting an activation voltage to the scan lines line by line from the first direction in a second duration, and the source driver inputting a pixel voltage of a second polarity to the data lines to charge the pixel capacitors; the gate driver inputting an activation voltage to the scan lines line by line from a second direction in a third duration, and the source driver inputting the pixel voltage of the first polarity to the data lines to charge the pixel capacitors; the gate driver inputting an activation voltage to the scan lines line by line from the second direction in a fourth duration, and the source driver inputting the pixel voltage of the second polarity to the data lines to charge the pixel capacitors; wherein the pixel capacitors of the same column have the same polarity in the same duration, and the first polarity and the second polarity are opposite, and the second direction and the first direction are opposite. 2 . The driving method of the liquid crystal display panel according to claim 1 , wherein the first duration, the second duration, the third duration and the fourth duration construct one drive cycle of the liquid crystal display panel. 3 . The driving method of the liquid crystal display panel according to claim 2 , wherein the first duration, the second duration, the third duration and the fourth duration are arranged in time sequence; or the third duration, the fourth duration, the first duration and the second duration are arranged in time sequence. 4 . The driving method of the liquid crystal display panel according to claim 1 , wherein a fifth duration is after the first duration, and in the fifth duration, the gate driver and the source driver perform the same operation according to the first duration; a sixth duration is after the second duration, and in the sixth duration, the gate driver and the source driver perform the same operation according to the second duration; a seventh duration is after the third duration, and in the seventh duration, the gate driver and the source driver perform the same operation according to the third duration; an eighth duration is after the fourth duration, and in the eighth duration, the gate driver and the source driver perform the same operation according to the fourth duration. 5 . The driving method of the liquid crystal display panel according to claim 4 , wherein the first duration to the eighth duration construct one drive cycle of the liquid crystal display panel. 6 . The driving method of the liquid crystal display panel according to claim 1 , wherein 2k durations are after the second duration, and 2j durations are after the fourth duration, and in two adjacent durations of the 2k durations, the gate driver and the source driver perform the same operation according to the first duration and the second duration, and in two adjacent durations of the 2j durations, the gate driver and the source driver perform the same operation according to the third duration and the fourth duration, wherein k and j are equal, and k and j are positive integers. 7 . The driving method of the liquid crystal display panel according to claim 1 , wherein the first duration, the second duration, the third duration and the fourth duration individually are one frame. 8 . The driving method of the liquid crystal display panel according to claim 1 , wherein the first direction is a direction from the top to the bottom, and the second direction is a direction from the bottom to the top; or, the first direction is a direction from the bottom to the top, and the second direction is a direction from the top to the bottom. 9 . The driving method of the liquid crystal display panel according to claim 1 , wherein the first polarity is a positive polarity, and the second polarity is a negative polarity; or, the first polarity is a negative polarity, and the second polarity is a positive polarity. 10 . The driving method of the liquid crystal display panel according to claim 1 , wherein a polarity inversion of the pixel capacitors is a row inversion or a frame inversion.
suitable for active matrices only · CPC title
for control of overall brightness · CPC title
with crosstalk due to leakage current of pixel switch in active matrix panels · CPC title
Control of polarity reversal in general · CPC title
Details of timing specific for flat panels, other than clock recovery · CPC title
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