Internal system namespace exposed through control memory buffer

Patent metadata

Field	Value
Publication number	US-2018260145-A1
Application number	US-201715454974-A
Country	US
Kind code	A1
Filing date	Mar 9, 2017
Priority date	Mar 9, 2017
Publication date	Sep 13, 2018
Grant date	—

Abstract

A solid state drive (SSD) and a method for managing data stored in the SSD is disclosed. In one embodiment, the SSD includes a memory controller and a controller memory buffer within the memory controller. The SSD further includes a host interface communicatively coupled to the memory controller and configured to receive a set of host commands from a host device. A first local processor of the SSD is configured to generate a set of local commands, and a second local processor of the SSD is configured to execute the set of local commands and the set of host commands. The memory controller is configured to store the set of local commands in a first area of the controller memory buffer reserved for the first local processor and to store the set of host commands in a second area of the controller memory buffer reserved for the host device.

First claim

What is claimed is:

1 . A solid state drive (SSD) comprising:
a memory controller; a controller memory buffer within the memory controller; a first local processor configured to generate a set of local commands; a host interface communicatively coupled to the memory controller and configured to receive a set of host commands from a host device; a second local processor configured to execute the set of local commands and the set of host commands, wherein
the memory controller is configured to store the set of local commands in a first area of the controller memory buffer reserved for the first local processor and to store the set of host commands in a second area of the controller memory buffer reserved for the host device.

2 . The SSD of claim 1 , wherein the memory controller is further configured to store local system data generated by the first local processor in the first area.

3 . The SSD of claim 1 , wherein the host interface is further configured to receive host data from the host device, and the memory controller is further configured to store the host data in the second area.

4 . The SSD of claim 1 , wherein the second local processor is configured to store a completion message in the first area after one of the set of local commands has been executed.

5 . The SSD of claim 2 , wherein the set of local commands includes a write command, and the second local processor is further configured to write local system data stored in the first area to one or more non-volatile memory devices communicatively coupled to the memory controller.

6 . The SSD of claim 2 , wherein the set of local commands includes a read command, and the second local processor is further configured to write local system data stored in one or more non-volatile memory devices communicatively coupled to the memory controller to the first area.

7 . The SSD of claim 2 , wherein the local system data includes metadata of host data written to one or more non-volatile memory devices communicatively coupled to the memory controller, logical-to-physical look up tables, read or write counts of logical block addresses, or timestamps of logical block address updates.

8 . The SSD of claim 3 , wherein the set of host commands includes a write command, and the second local processor is further configured to write host data stored in the second area to one or more non-volatile memory devices communicatively coupled to the memory controller.

9 . The SSD of claim 3 , wherein the set of host commands includes a read command, and the second local processor is further configured to retrieve host data stored in one or more non-volatile memory devices communicatively coupled to the memory controller.

10 . The SSD of claim 1 , wherein the first local processor is a flash translation layer (FTL) processor or a flash interface layer (FIL) processor, and the second local processor is a command layer processor.

11 . A method of managing data stored in a solid state drive (SSD), the method comprising:
reserving a first area and a second area of a controller memory buffer within a memory controller; generating, by a first local processor, a set of local commands; receiving, by a host interface communicatively coupled to the memory controller, a set of host commands from a host device; storing the set of local commands in the first area and the set of host commands in the second area; and executing, by a second local processor, the set of local commands and the set of host commands.

12 . The method of claim 11 , further comprising:
generating, by the first local processor, local system data; and storing the local system data in the first area.

13 . The method of claim 11 , further comprising:
receiving, by the host interface, host data from the host device; and storing the host data in the second area.

14 . The method of claim 11 , further comprising:
storing, by the second local processor, a completion message in the first area after one of the set of local commands has been executed.

15 . The method of claim 12 , further comprising:
writing, by the second local processor, local system data in the first area to one or more of non-volatile memory devices communicatively coupled to the memory controller when the set of local commands includes a write command.

16 . The method of claim 12 , further comprising:
writing, by the second local processor, local system data in one or more of the non-volatile memory devices communicatively coupled to the memory controller to the first area when the set of local commands includes a read command.

17 . The method of claim 12 , wherein the local system data includes metadata of host data written to one or more non-volatile memory devices communicatively coupled to the memory controller, logical-to-physical look up tables, read or write counts of logical block addresses, or timestamps of logical block address updates.

18 . The method of claim 13 , further comprising:
writing, by the second local processor, host data in the second area to one or more non-volatile memory devices communicatively coupled to the memory controller when the set of host commands includes a write command.

19 . The method of claim 13 , further comprising:
retrieving, by the second local processor, host data in one or more non-volatile memory devices communicatively coupled to the memory controller when the set of host commands includes a read command.

20 . The method of claim 11 , wherein the first local processor is a flash translation layer (FTL) processor or a flash interface layer (FIL) processor, and the second local processor is a command layer processor

Assignees

• Toshiba Memory Corp

Inventors

• Margetts Julien

Classifications

• G06F3/065

  Replication mechanisms · CPC title

• G06F12/0246

  in block erasable memory, e.g. flash memory · CPC title

• G06F2212/7201

  Logical to physical mapping or translation of blocks or pages · CPC title

• G06F3/0659

  Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title

• G06F3/0619 Primary

  in relation to data integrity, e.g. data losses, bit errors · CPC title