Storage System and Method for Handling a Burst of Errors

Patent metadata

Field	Value
Publication number	US-2018246783-A1
Application number	US-201815968468-A
Country	US
Kind code	A1
Filing date	May 1, 2018
Priority date	Mar 4, 2016
Publication date	Aug 30, 2018
Grant date	—

Abstract

A storage system and method for handling a burst of errors is provided. In one embodiment, the method comprises generating a protograph using an error code generation method; generating a first partially-lifted protograph based on the generated protograph that avoids a first burst of errors; generating a fully-lifted protograph based on the generated protograph and the generated first partially-lifted protograph; and providing the fully-lifted protograph to a storage system comprising a memory.

First claim

What is claimed is:

1 . A method for handling a burst of errors, the method comprising:
generating a protograph using an error code generation method; generating a first partially-lifted protograph based on the generated protograph that avoids a first burst of errors; generating a fully-lifted protograph based on the generated protograph and the generated first partially-lifted protograph; and providing the fully-lifted protograph to a storage system comprising a memory.

2 . The method of claim 1 , wherein the burst of errors is caused by a grown bad column.

3 . The method of claim 1 , wherein the first partially-lifted protograph comprises K number of edges, wherein every K number of bits in a codeword contains an error.

4 . The method of claim 1 further comprising generating at least one other partially-lifted protograph that avoids a respective at least one other burst of errors.

5 . The method of claim 4 , wherein the first partially-lifted protograph comprises K number of edges, wherein every K number of bits in a codeword contains an error, and wherein one of the at least one other partially-lifted protograph comprises N number of edges, wherein every N number of bits in the codeword contains an error.

6 . The method of claim 1 , wherein the memory comprises a three-dimensional memory.

7 . The method of claim 1 , wherein the storage system is embedded in a host.

8 . The method of claim 1 , wherein the storage system is removably connectable to a host.

9 . A system comprising:
a memory; and a controller configured to:
generate a protograph with minimal overlapping checks between variables; and
generate a partially-lifted protograph by lifting the generated protograph by K number of levels, wherein every K number of bits in a codeword contains an error.

10 . The system of claim 9 , wherein the controller is further configured to generate additional partially-lifted protographs until a fully-lifted protograph is created.

11 . The system of claim 10 , wherein the controller is further configured to provide the fully-lifted protograph to a storage system.

12 . The system of claim 11 , wherein the storage system is embedded in a host.

13 . The system of claim 11 , wherein the storage system comprises a three-dimensional memory.

14 . The system of claim 9 , wherein the error is caused by a grown bad column.

15 . A system comprising:
means for generating a bipartite graph using an error code generation method; means for generating a first partially-lifted bipartite graph based on the generated bipartite graph that avoids a first error; and means for generating a fully-lifted bipartite graph based on the generated bipartite graph and the generated first partially-lifted bipartite graph.

16 . The system of claim 15 , wherein the error is caused by a grown bad column.

17 . The system of claim 15 , wherein the first partially-lifted bipartite graph comprises K number of edges, wherein every K number of bits in a codeword contains an error.

18 . The system of claim 15 further comprising means for generating at least one other partially-lifted bipartite graph that avoids a respective at least one other error.

19 . The system of claim 15 further comprising means for providing the fully-lifted bipartite graph to a storage system.

20 . The system of claim 19 , wherein the storage system comprises a three-dimensional memory.

Assignees

• Sandisk Technologies Llc

Inventors

• Avraham David
• Zamir Ran
• Sharon Eran

Classifications

• G11C29/52

  Protection of memory contents; Detection of errors in memory contents · CPC title

• H03M13/17

  Burst error correction, e.g. error trapping, Fire codes · CPC title

• H03M13/1102

  Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes · CPC title

• H03M13/1108

  Hard decision decoding, e.g. bit flipping, modified or weighted bit flipping · CPC title

• H03M13/27

  using interleaving techniques · CPC title