Data storage device, operating method of the same, and electronic system including the same

Patent metadata

Field	Value
Publication number	US-2018246674-A1
Application number	US-201815905933-A
Country	US
Kind code	A1
Filing date	Feb 27, 2018
Priority date	Feb 28, 2017
Publication date	Aug 30, 2018
Grant date	—

Abstract

A data storage device, a method of operating the data storage device, and an electronic system including the data storage device are provided. The data storage device includes a controller mounted on a substrate, and a plurality of memory packages configured to be controlled by the controller and to transmit and receive data to and from the controller via M channels (where M is an integer of 1 to 16). When the data storage device is used, a phenomenon in which heat generation is concentrated locally may be mitigated.

First claim

1 - 17 . (canceled)

18 . A method of operating a data storage device comprising a controller and a plurality of memory packages configured to be controlled by the controller and to transmit and receive data to and from the controller via M channels (where M is a first integer of 1 to 16), each of which comprises N ways (where N is a second integer of 2 to 128), each of the memory packages having at least one semiconductor die, the method comprising:
performing a write operation on a semiconductor die included in one of the plurality of memory packages belonging to one channel; determining whether a package switching condition is satisfied; and performing a next write operation on another semiconductor die included in another memory package belonging to the one channel when it is determined that the package switching condition is satisfied.

19 . The method of claim 18 , wherein the package switching condition is satisfied when a number of semiconductor dies, to which a write operations are successively transferred in a package to which a semiconductor die on which the write operations are being performed belongs, is greater than or equal to a package switching reference value.

20 . The method of claim 19 , wherein the package switching reference value is a selected integer of 1 to 8.

21 . The method of claim 18 , wherein each of the memory packages comprises a plurality of semiconductor dies, the method further comprising transferring the write operation to another semiconductor die in the one memory package on which the write operation is being performed, when it is determined that the package switching condition is not satisfied.

22 . The method of claim 18 , wherein the package switching condition is time,
wherein, after write operations are performed on any one memory package for a reference time, the next write operation is subsequently performed on a next memory package, and wherein the reference time is about 0.2 milliseconds to about 10 seconds.

23 . The method of claim 18 , wherein the package switching condition is a data size,
wherein, after data having a reference data size is written to any one memory package, the next write operation is subsequently performed on a next memory package, and wherein the reference data size is about 4 kilobytes (KB) to about 300 megabytes (MB).

24 - 28 . (canceled)

29 . For a data storage device comprising a controller and a plurality of memory packages to be controlled by the controller and to transmit and receive data to and from the controller via M channels (where M is a first integer), each of which comprises N ways (where N is a second integer greater than one), each of the memory packages including at least one semiconductor die, a method comprising:
performing a write operation on a first one of the semiconductor dies included in a first one of the memory packages, wherein the first one of the semiconductor dies and the first one of the plurality of memory packages belong to one channel among the M channels; determining whether a write operation transfer condition is satisfied; and when it is determined that the write operation transfer condition is satisfied, transferring the write operation to a second one of the semiconductor dies which belongs to the one channel.

30 . The method of claim 29 , further comprising:
determining whether a package switching condition is satisfied, and when it is determined that the package switching condition is satisfied, the second one of the semiconductor dies is included in a second one of the memory packages which belongs to the one channel.

31 . The method of claim 30 , wherein the package switching condition is that a time period of writing data to the first one of the memory packages is greater than a reference time period.

32 . The method of claim 30 , wherein the package switching condition is that an amount of data written to the first one of the memory packages in one or more consecutive write operations is greater than a reference data size.

33 . The method of claim 29 , further comprising:
determining whether a package switching condition is satisfied, and when it is determined that the package switching condition is not satisfied, the second one of the semiconductor dies is included in the first one of the memory packages.

34 . The method of claim 29 , wherein the write operation transfer condition is that a time interval of writing data to the first semiconductor die is greater than a specified time interval.

35 . The method of claim 29 , wherein the write operation transfer condition is that an amount of data to the first semiconductor die is greater than a specified amount of data.

36 . The method of claim 19 , wherein the package switching reference value is determined by the number of ways (N) and the number of the memory packages (P).

37 . The method of claim 30 , wherein the package switching condition is determined by the number of ways (N) and the number of the memory packages (P) in the data storage device.

38 . The method of claim 30 , wherein the package switching condition is determined by the number of ways (N) over the number of the memory packages (P) in the data storage device.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kim Duk-Soo
• Jeong Jong-Wook
• Lim Hyoung-Taek
• Gu Min-Woo

Classifications

• G06F3/0688

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• G06F3/0635

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• G06F3/061 Primary

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• G11C16/0483

  comprising cells having several storage transistors connected in series · CPC title

• G11C11/5671

  using charge trapping in an insulator · CPC title