Receiving apparatus and decoding method thereof

US2018241599A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2018241599-A1
Application numberUS-201815957270-A
CountryUS
Kind codeA1
Filing dateApr 19, 2018
Priority dateOct 19, 2015
Publication dateAug 23, 2018
Grant date

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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A receiving apparatus includes: a first decoder configured to decode a signal transmitted through a first layer from a layered division multiplexing (LDM) signal using a parity check matrix to generate low density parity check (LDPC) information word bits and parity bits; an encoder configured to encode the LDPC information word bits, generated by decoding the signal transmitted through the first layer, using the parity check matrix to generate parity bits corresponding only to preset columns in the parity check matrix; and a second decoder configured to decode a signal obtained by removing, from the LDM signal, a signal corresponding to the LDPC information word bits generated by decoding the signal transmitted through the first layer, the parity bits generated by the encoder, and the parity bits generated by the first decoder except the parity bits generated by the encoder, thereby to generate information word bits transmitted through a second layer.

First claim

Opening claim text (preview).

What is claimed is: 1 . A receiving apparatus receiving and decoding a layered division multiplexing (LDM) signal which is generated based on a first layer and a second layer, the receiving apparatus comprising: a first decoder configured to decode the LDM signal based on a parity check matrix comprising a plurality of columns to generate first information bits and first parity bits transmitted through the first layer, each of the first parity bits corresponding to each of the plurality of columns; an encoder configured to encode the first information bits based on the parity check matrix to generate second parity bits corresponding to predetermined columns among the plurality of columns; and a second decoder configured to decode a signal obtained by removing, from the LDM signal, a signal which is generated based on the first information bits, one or more parity bits of the first parity bits except parity bits corresponding to the predetermined columns, and the second parity bits, to generate second information bits transmitted through the second layer. 2 . The receiving apparatus as claimed in claim 1 , wherein the predetermined columns are columns having a degree of 1 in the parity check matrix. 3 . The receiving apparatus as claimed in claim 2 , wherein the parity check matrix comprises a first parity check matrix comprising a first information sub matrix and a first parity sub matrix which is a dual diagonal matrix, and a second parity check matrix comprising a second information sub matrix and a second parity sub matrix which is an identity matrix, and wherein the encoder is configured to generate the second parity bits corresponding to the predetermined columns having the degree of 1 in the parity check matrix. 4 . The receiving apparatus as claimed in claim 1 , wherein the first decoder comprises a first low density parity check (LDPC) decoder and a first Bose, Chaudhuri, Hocquenghem (BCH) decoder, wherein the first LDPC decoder is configured to decode the LDM signal to generate first low density parity check (LDPC) information bits transmitted through the first layer, and wherein the first BCH decoder is configured to decode the first LDPC information bits to generate bits transmitted through the first layer. 5 . The receiving apparatus as claimed in claim 4 , wherein the encoder comprises an LDPC encoder, and wherein the LDPC encoder is configured to encode the first LDPC information bits to generate the second parity bits. 6 . The receiving apparatus as claimed in claim 5 , wherein the encoder further comprises an BCH encoder, and wherein the BCH encoder is configured to encode the bits to generate BCH parity bits, and wherein the LDPC encoder is configured to encode the bits and the BCH parity bits to generate the second parity bits. 7 . The receiving apparatus as claimed in claim 4 , wherein the second decoder comprises a second LDPC decoder and a second BCH decoder, wherein the second LDPC decoder is configured to decode the obtained signal to generate second LDPC information bits transmitted through the second layer, and wherein the second BCH decoder is configured to decode the second LDPC information bits to generate bits transmitted through the second layer. 8 . A method of a receiving apparatus receiving and decoding a layered division multiplexing (LDM) signal which is generated based on a first layer and a second layer, the method comprising: decoding the LDM signal based on a parity check matrix comprising a plurality of columns to generate first information bits and first parity bits transmitted through the first layer, each of the first parity bits corresponding to each of the plurality of columns; encoding the first information bits based on the parity check matrix to generate second parity bits corresponding to predetermined columns among the plurality of columns; and decoding a signal obtained by removing, from the LDM signal, a signal which is generated based on the first information bits, one or more parity bits of the first parity bits except parity bits corresponding to the predetermined columns, and the second parity bits, to generate second information bits transmitted through the second layer. 9 . The method as claimed in claim 8 , wherein the predetermined columns are columns having a degree of 1 in the parity check matrix. 10 . The method as claimed in claim 9 , wherein the parity check matrix comprises a first parity check matrix comprising a first information sub matrix and a first parity sub matrix which is a dual diagonal matrix, and a second parity check matrix comprising a second information sub matrix and a second parity partial matrix which is an identity matrix, and wherein the predetermined preset columns have the degree of 1 in the parity check matrix. 11 . The method as claimed in claim 8 , wherein the decoding the LDM signal: decodes the LDM signal to generate first low density parity check (LDPC) information bits transmitted through the first layer and decodes the first LDPC information bits to generate bits transmitted through the first layer. 12 . The method as claimed in claim 11 , wherein the encoding encodes the first LDPC information bits to generate the second parity bits. 13 . The method as claimed in claim 12 , wherein the encoding encode the bits to generate BCH parity bits and encodes the bits and the BCH parity bits to generate the second parity bits. 14 . The method as claimed in claim 11 , wherein the decoding the obtained signal decodes the obtained signal to generate second LDPC information bits transmitted through the second layer and decodes the second LDPC information bits to generate bits transmitted through the second layer.

Assignees

Inventors

Classifications

  • Multiresolution systems · CPC title

  • in conjunction with detection of multiuser or interfering signals, e.g. iteration between CDMA or MIMO detector and FEC decoder (for spatial equalizer H04L25/03286) · CPC title

  • in which the information is carried by both the individual signal points and the subset to which the individual points belong, e.g. using coset coding, lattice coding, or related schemes · CPC title

  • Unequal error protection (for format H04L1/0078; for codes per se H03M13/35) · CPC title

  • Arrangements at the receiver end · CPC title

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What does patent US2018241599A1 cover?
A receiving apparatus includes: a first decoder configured to decode a signal transmitted through a first layer from a layered division multiplexing (LDM) signal using a parity check matrix to generate low density parity check (LDPC) information word bits and parity bits; an encoder configured to encode the LDPC information word bits, generated by decoding the signal transmitted through the fir…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H04N19/30. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Aug 23 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).