Bi-directional multi-mode charge pump

Patent metadata

Field	Value
Publication number	US-2018226887-A1
Application number	US-201815944214-A
Country	US
Kind code	A1
Filing date	Apr 3, 2018
Priority date	Mar 25, 2016
Publication date	Aug 9, 2018
Grant date	—

Abstract

Some embodiments include apparatus and methods using a charge pump coupled to a first supply power node and a second supply power node. The charge pump is arranged to transfer charge from the first supply power node to the second supply power node during a first time interval and to transfer charge from the second supply power node to the first supply power node during a second time interval.

First claim

What is claimed is:

1 . An apparatus comprising:
a capacitor; a first pair of transistors coupled between a first node and a second node, the first pair of transistors including a shared node coupled to a first plate of the capacitor; a second pair of transistors coupled between the first node and ground, the second pair of transistors including a shared node coupled to a second plate of the capacitor; a first additional transistor coupled between the first plate of the capacitor and ground; and a second additional transistor coupled between the second plate of the capacitor and the second node.

2 . The apparatus of claim 1 , further comprising:
a third additional transistor coupled between the first node and the first plate of the capacitor.

3 . The apparatus of claim 2 , further comprising:
a fourth additional transistor coupled between the second node and the second plate of the capacitor.

4 . The apparatus of claim 3 , wherein each of the first and second pairs of transistors includes transistors of different types, the first and second additional transistors include transistors of a same type, and the third and fourth additional transistors include transistors of a same type.

5 . The apparatus of claim 2 , wherein each of the first node and the second node is arranged to provide a voltage during a time interval, and the voltage at the first node during the time interval has a value less than a value of the voltage at the second node during the time interval.

6 . The apparatus of claim 5 , wherein each of the first node and the second node is arranged to provide a voltage during an additional time interval, and the voltage at the first node during the additional time interval has a value greater than a value of the voltage at the second node during the additional time interval.

7 . The apparatus of claim 1 , wherein the capacitor, the first pair of transistors, the second pair of transistors, and the first and second additional transistors are part of a ring oscillator.

8 . An apparatus comprising:
a first stage of a ring oscillator; and a second stage of the ring oscillator coupled to the first stage, each of the stages including:
a voltage booster circuit coupled to a first node and a second node; and
a select circuit to provide signals in order to cause the voltage booster circuit to transfer charge from the first node to the second node during a first state of the voltage booster circuit and to cause the voltage booster circuit to transfer charge from the second node to the first node during a second state of the voltage booster circuit.

9 . The apparatus of claim 8 , wherein the select circuit is arranged to provide the signals to control transistors included in the voltage booster circuit, and the signals have first values in the first state of the voltage booster circuit and second values in the second state of the voltage booster circuit.

10 . The apparatus of claim 9 , wherein the select circuit includes switches to pass the signals to the voltage booster circuit in order to provide the signals controlling the transistors.

11 . The apparatus of claim 10 , wherein a switch among the switches is arranged to turn on during the first state of the voltage booster circuit and turn off during the second state of the voltage booster circuit.

Assignees

• Intel Corp

Inventors

• Kulkarni Jaydeep
• Shim Yong
• Meinerzhagen Pascal A
• Khellah Muhammad M

Classifications

• H02M3/07 Primary

  using capacitors charged and discharged alternately by semiconductor devices with control electrode {, e.g. charge pumps} · CPC title

• H03K5/19

  Monitoring patterns of pulse trains (indicating amplitude G01R19/00; indicating frequency G01R23/00; measuring characteristics of individual pulses G01R29/02) · CPC title

• H03K3/0315

  Ring oscillators · CPC title

• H02M1/0032

  Control circuits allowing low power mode operation, e.g. in standby mode · CPC title