Light emitting structure

Patent metadata

Field	Value
Publication number	US-2018197844-A1
Application number	US-201815911693-A
Country	US
Kind code	A1
Filing date	Mar 5, 2018
Priority date	Jul 30, 2012
Publication date	Jul 12, 2018
Grant date	—

Abstract

A method and structure for receiving a micro device on a receiving substrate are disclosed. A micro device such as a micro LED device is punched-through a passivation layer covering a conductive layer on the receiving substrate, and the passivation layer is hardened. In an embodiment the micro LED device is punched-through a B-staged thermoset material. In an embodiment the micro LED device is punched-through a thermoplastic material.

First claim

What is claimed is:

1 . A display comprising:
a substrate; a first bottom electrode line on the substrate; a passivation layer over the display substrate; a first plurality of vertical semiconductor-based light emitting diodes (LEDs) coupled with the first bottom electrode line and embedded within the passivation layer such that the passivation layer laterally surrounds a quantum well within each of the first plurality of vertical semiconductor-based LEDs; a second plurality of vertical semiconductor-based LEDs embedded within the passivation layer such that the passivation layer laterally surrounds a quantum well within each of the second plurality of vertical semiconductor-based LEDs, wherein the second plurality of vertical semiconductor-based LEDs and the first plurality of vertical semiconductor-based LEDs share a same vertical semiconductor-based LED; and a first top electrode line in electrical contact with the second plurality of vertical semiconductor-based LEDs.

2 . The display of claim 1 , wherein the first bottom electrode line is coupled with a driving circuit.

3 . The display of claim 2 , wherein the first plurality of vertical semiconductor-based light emitting diodes (LEDs) is designed for a first color emission.

4 . The display of claim 3 , wherein the second plurality of vertical semiconductor-based light emitting diodes (LEDs) includes the same vertical semiconductor-based LED designed for the first color emission and a second LED designed for a second color emission different from the first color emission.

5 . The display of claim 4 , wherein the first color emission is blue, and the second color emission is green.

6 . The display of claim 4 , wherein the second LED designed for the second color emission is coupled with a second bottom electrode line on the substrate.

7 . The display of claim 6 , wherein the first plurality of vertical semiconductor-based LEDs is bonded to first bottom electrode line with a corresponding plurality of bonding layers, and the second LED is bonded to the second bottom electrode line with a corresponding bonding layer.

8 . The display substrate of claim 7 , wherein each bonding layer is an alloy bonding layer.

9 . The display substrate of claim 8 , wherein each alloy bonding layer is an alloy of a first bonding layer on a corresponding vertical semiconductor-based LED with a second bonding layer on a corresponding first or second bottom electrode line.

10 . The display substrate of claim 9 , wherein the alloy bonding layer has a higher melting temperature than both of the first bonding layer and the second bonding layer.

11 . The display of claim 2 , wherein the first top electrode line is formed of a transparent conductive oxide material and is directly over the second plurality of vertical semiconductor-based LEDs.

12 . The display of claim 2 , further comprising one or more transparent conductor layers directly over and electrically connecting the second plurality of vertical semiconductor-based LEDs to the first top electrode layer.

13 . The display of claim 1 , wherein the passivation layer comprises a thermoset material.

14 . The display of claim 1 , wherein the second electrode line is connected to ground.

15 . The display substrate of claim 1 , wherein each vertical semiconductor-based LED comprises sidewalls and a conformal dielectric barrier layer spanning along the sidewalls.

16 . The display substrate of claim 15 , wherein the conformal dielectric barrier layer is 50-600 angstroms thick.

17 . The display of claim 1 , wherein the display substrate has a pixel density of greater than 300 pixels per inch.

18 . The display substrate of claim 17 , wherein each vertical semiconductor-based LED has a maximum width of 1 to 100 μm.

19 . The display of claim 1 , further comprising a second passivation layer over the substrate and underneath the passivation layer.

20 . The display substrate of claim 19 , wherein the second passivation layer comprises a material selected form the group consisting of silicon oxide (SiO 2 ), silicon nitride (SiN x ), poly(methyl methacrylate) (PMMA), benzocyclobutene (BCB), polyimide, and polyester.

Assignees

• Apple Inc

Inventors

• Higginson John A
• Bibl Andreas
• Hu Hsin-Hua

Classifications

• H10W74/01

  Manufacture or treatment · CPC title

• H10W74/137

  the encapsulations being directly on the semiconductor body (H10W74/134 takes precedence) · CPC title

• H10W90/00 Primary

  Package configurations · CPC title

• H01L33/42

  Electricity · mapped topic

• H01L27/1262

  Electricity · mapped topic