Methods to introduce sub-micrometer, symmetry-breaking surface corrugation to silicon substrates to increase light trapping

Patent metadata

Field	Value
Publication number	US-2018190841-A1
Application number	US-201815904296-A
Country	US
Kind code	A1
Filing date	Feb 23, 2018
Priority date	Oct 18, 2013
Publication date	Jul 5, 2018
Grant date	—

Abstract

Provided is a method for fabricating a nano-patterned surface. The method includes forming a mask on a substrate, patterning the substrate to include a plurality of symmetry-breaking surface corrugations, and removing the mask. The mask includes a pattern defined by mask material portions that cover first surface portions of the substrate and a plurality of mask space portions that expose second surface portions of the substrate, wherein the plurality of mask space portions are arranged in a lattice arrangement having a row and column, and the row is not oriented parallel to a [110] direction of the substrate. The patterning the substrate includes anisotropically removing portions of the substrate exposed by the plurality of spaces.

First claim

1 - 31 . (canceled)

32 . An optoelectronic device, comprising:
a patterned substrate comprising a surface having a plurality of symmetry-breaking surface corrugations, wherein the symmetry-breaking surface corrugations comprise a symmetry selected from at least one of C 4v , C 4 , C 2v , C 2 and C 1 ; and at least one layer formed on the patterned substrate.

33 . The optoelectronic device of claim 32 , wherein the at least one layer comprises one or more selected from the group consisting of a metal, a polymer, and a semiconductor.

34 . The optoelectronic device of claim 33 , wherein the semiconductor comprises one or more selected from the group consisting of an inorganic semiconductor and an organic semiconductor.

35 . The optoelectronic device of claim 34 , wherein the inorganic semiconductor comprises amorphous silicon (a-Si).

36 . The optoelectronic device of claim 32 , wherein the plurality of symmetry-breaking surface corrugations defines an array of inverted nanopyramids.

37 . The optoelectronic device of claim 36 , wherein the surface comprises flat, unetched areas between the inverted nanopyramids.

38 . The optoelectronic device of claim 32 , wherein the silicon substrate comprises c-Si.

39 . The optoelectronic device of claim 32 , wherein the plurality of symmetry-breaking surface corrugations defines an array of pyramidal protrusions.

40 . The optoelectronic device of claim 32 , wherein the plurality symmetry-breaking surface corrugations have C 2 symmetry.

41 . The optoelectronic device of claim 32 , wherein the at least one layer is conformally disposed on the plurality of symmetry-breaking surface corrugations.

42 . The optoelectronic device of claim 32 , wherein the at least one layer comprises a polymer layer, a transparent conducting oxide layer, or an amorphous silicon (a-Si) layer conformally disposed on the plurality of symmetry-breaking surface corrugations.

43 . The optoelectronic device of claim 32 , wherein the at least one layer comprises a plurality of layers, the plurality of layers comprising a front contact layer, a back contact layer and an active layer disposed between front and back contact layers.

Assignees

• Stc Unm

Inventors

• Han Sang Eon
• Hoard Brittany R
• Han Sang M
• Ghosh Swapnadip

Classifications

• H03H9/145

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• H03H9/25

  Constructional features of resonators using surface acoustic waves {(devices for manipulating acoustic surface waves in general G10K11/36)} · CPC title

• G02B1/005

  made of photonic crystals or photonic band gap materials (photonic band-gap structures or photonic lattices in integrated optics G02B6/1225; photonic band-gap structures or photonic lattices in optical fibres G02B6/02295) · CPC title

• H03H9/10

  Mounting in enclosures {(constructional combinations of enclosure with electromechanical and other electronic elements H03H9/0538)} · CPC title

• Y02E10/547

  Monocrystalline silicon PV cells · CPC title