Thin Film Transistor Substrate and Display Device

US2018190822A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2018190822-A1
Application numberUS-201715839611-A
CountryUS
Kind codeA1
Filing dateDec 12, 2017
Priority dateDec 30, 2016
Publication dateJul 5, 2018
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Disclosed is a thin film transistor substrate that may include a base substrate, a first protection film disposed on the base substrate, an oxide semiconductor layer disposed on the first protection film, a gate electrode insulated from the oxide semiconductor layer and partially overlapped with at least one portion of the oxide semiconductor layer, a source electrode connected with the oxide semiconductor layer, and a drain electrode provided at a predetermined interval from the source electrode and connected with the oxide semiconductor layer, wherein the oxide semiconductor layer has a hydrogen content of 2.4 at % (atomic % or atom %)˜2.6 at %.

First claim

Opening claim text (preview).

What is claimed is: 1 . A thin film transistor substrate comprising: a base substrate; a first protection film disposed on the base substrate; an oxide semiconductor layer disposed on the first protection film; a gate electrode insulated from the oxide semiconductor layer and partially overlapped with at least one portion of the oxide semiconductor layer; a source electrode connected with the oxide semiconductor layer; and a drain electrode provided at a predetermined interval from the source electrode and connected with the oxide semiconductor layer, wherein the oxide semiconductor layer has a hydrogen content of 2.4 at % (atomic % or atom %)˜2.6 at %. 2 . The thin film transistor substrate according to claim 1 , wherein the first protection film includes silicon oxide. 3 . The thin film transistor substrate according to claim 1 , wherein the first protection film includes silicon nitride. 4 . The thin film transistor substrate according to claim 1 , wherein the first protection film includes: at least one silicon oxide layer; and at least one silicon nitride layer, wherein at least one silicon oxide layer and at least one silicon nitride layer are alternately disposed. 5 . The thin film transistor substrate according to claim 4 , wherein any one of the at least one silicon oxide layers is in contact with the oxide semiconductor layer, and the silicon oxide layer being in contact with the oxide semiconductor layer has a thickness of 100 nm˜500 nm. 6 . The thin film transistor substrate according to claim 1 , further comprising a second protection film disposed on the oxide semiconductor layer. 7 . The thin film transistor substrate according to claim 6 , wherein any one of the first protection film and the second protection film has a hydrogen content of 0.7 at %˜0.8 at %, and the other of the first protection film and the second protection film has a hydrogen content of 3.0 at %˜3.1 at %. 8 . A method for manufacturing a thin film transistor substrate comprising: forming a first protection film on a base substrate; forming an oxide semiconductor layer on the first protection film; forming source and drain electrodes provided at a predetermined interval from each other and connected with the oxide semiconductor layer; and forming a gate electrode insulated from the oxide semiconductor layer and partially overlapped with at least one portion of the oxide semiconductor layer, wherein the oxide semiconductor layer has a hydrogen content of 2.4 at % (atomic % or atom %)˜2.6 at %. 9 . The method according to claim 8 , further comprising implanting hydrogen into the oxide semiconductor layer. 10 . The method according to claim 8 , further comprising forming a second protection film on the oxide semiconductor layer. 11 . The method according to claim 10 , wherein any one of the first protection film and the second protection film has a hydrogen content of 0.7 at %˜0.8 at %, and the other of the first protection film and the second protection film has a hydrogen content of 3.0 at %˜3.1 at %. 12 . The method according to claim 10 , further comprising carrying out a thermal treatment after forming the second protection film. 13 . A display device comprising: a substrate; a thin film transistor disposed on the substrate; and a light-amount adjusting layer disposed on the thin film transistor, wherein the thin film transistor includes: a first protection film disposed on the substrate; an oxide semiconductor layer disposed on the first protection film; a gate electrode insulated from the oxide semiconductor layer and overlapped with at least one portion of the oxide semiconductor layer; a source electrode connected with the oxide semiconductor layer; and a drain electrode provided at a predetermined interval from the source electrode and connected with the oxide semiconductor layer, wherein the oxide semiconductor layer has a hydrogen content of 2.4 at %˜2.6 at %. 14 . The display device according to claim 13 , wherein the light-amount adjusting layer is an organic light emitting device or a liquid crystal layer.

Assignees

Inventors

Classifications

  • in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Electricity · mapped topic

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What does patent US2018190822A1 cover?
Disclosed is a thin film transistor substrate that may include a base substrate, a first protection film disposed on the base substrate, an oxide semiconductor layer disposed on the first protection film, a gate electrode insulated from the oxide semiconductor layer and partially overlapped with at least one portion of the oxide semiconductor layer, a source electrode connected with the oxide s…
Who is the assignee on this patent?
Lg Display Co Ltd, Hangyang Univ Industry Univ Cooperation Foundation
What technology area does this patent fall under?
Primary CPC classification H01L29/7869. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Jul 05 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).