Integrated cantilever switch

Patent metadata

Field	Value
Publication number	US-2018182902-A1
Application number	US-201815892028-A
Country	US
Kind code	A1
Filing date	Feb 8, 2018
Priority date	Mar 31, 2015
Publication date	Jun 28, 2018
Grant date	—

Abstract

An integrated transistor in the form of a nanoscale electromechanical switch eliminates CMOS current leakage and increases switching speed. The nanoscale electromechanical switch features a semiconducting cantilever that extends from a portion of the substrate into a cavity. The cantilever flexes in response to a voltage applied to the transistor gate thus forming a conducting channel underneath the gate. When the device is off, the cantilever returns to its resting position. Such motion of the cantilever breaks the circuit, restoring a void underneath the gate that blocks current flow, thus solving the problem of leakage. Fabrication of the nano-electromechanical switch is compatible with existing CMOS transistor fabrication processes. By doping the cantilever and using a back bias and a metallic cantilever tip, sensitivity of the switch can be further improved. A footprint of the nano-electromechanical switch can be as small as 0.1×0.1 μm 2 .

First claim

1 . A device, comprising:
a substrate; a first semiconductor layer on the substrate, the first semiconductor layer including a first opening; a second semiconductor layer on the first semiconductor layer, the second semiconductor layer including a second opening; a third semiconductor layer on the second semiconductor layer, the third semiconductor layer including a third opening, the second semiconductor layer including an extension that overlaps the first and third openings; a gate on the third semiconductor layer and aligned with the extension of the second semiconductor layer.

2 . The device of claim 1 , further comprising:
a source region on the third semiconductor layer adjacent to a first side of the gate; and a drain region on the third semiconductor layer adjacent to a second side of the gate.

3 . The device of claim 2 wherein each of the source region and the drain region extends at least partially over the third opening.

4 . The device of claim 2 wherein the source region and the drain region are spaced apart from the adjacent first side and the adjacent second side of the gate, respectively.

5 . The device of claim 4 , further comprising a sealant between the source region and the adjacent first side of the gate and between the drain region and the adjacent second side of the gate.

6 . The device of claim 1 , further comprising:
a metal tip attached to the extension of the second semiconductor layer, the metal tip extends between an end of the extension and the second opening.

7 . The device of claim 1 wherein the first and third openings are aligned with one another and the second opening partially overlaps the first and third openings.

8 . The device of claim 1 , further comprising a buried oxide layer between the substrate and the first semiconductor layer.

9 . The device of claim 1 wherein the first, second, and third semiconductor layers are silicon layers.

10 . The device of claim 1 wherein the first semiconductor layer has a thickness within a range of 10 nm to 15 nm, inclusive, the second semiconductor layer has a thickness within a range of 15 nm to 30 nm, inclusive, and the third semiconductor layer has a thickness within a range of 10 nm to 15 nm, inclusive.

11 . A device, comprising:
a substrate; a buried oxide layer on the substrate; a plurality of semiconductor layers on the buried oxide layer, the plurality of semiconductor layers defining a cavity that extends through each of the plurality of semiconductor layers, and a cantilever that extends into the cavity, the cantilever being part of one of the plurality of semiconductor layers; and a gate on the plurality of semiconductor layers and aligned with the cavity.

12 . The device of claim 11 wherein the plurality of semiconductor layers includes:
a first semiconductor layer on the buried oxide layer;
a second semiconductor layer on the first semiconductor layer; and
a third semiconductor layer on the second semiconductor layer,
wherein the cantilever is a part of the second semiconductor layer, and the cavity includes a first portion that extends through the first semiconductor layer, a second portion that extends through the second semiconductor layer, and a third portion that extends through the third semiconductor layer.

13 . The device of claim 12 wherein the first portion and the third portion of the cavity are aligned with one another and the second portion partially overlaps the first and the third portions.

14 . The device of claim 11 , further comprising a metal tip attached to an end of the cantilever.

15 . The device of claim 11 , further comprising an insulating material surrounding a perimeter of the plurality of semiconductor layers, the gate being anchored to the insulating material and suspended over the cavity.

16 . An electromechanical switch, comprising:
a substrate having a first surface; a plurality of semiconductor layers on the substrate; a cavity that extends through each of the plurality of semiconductor layers; a cantilever that extends into the cavity along a direction parallel to the surface of the substrate, the cantilever being a part of at least one of the plurality of semiconductor layers; a gate suspended over the cavity; a source region on the plurality of semiconductor layers and adjacent to a first side of the gate; and a drain region on the plurality of semiconductor layers and adjacent to a second side of the gate opposite to the first side.

17 . The electromechanical switch of claim 16 , further comprising a metal tip attached to an end of cantilever.

18 . The electromechanical switch of claim 16 , further comprising an insulating material surrounding a perimeter of the plurality of semiconductor layers, the gate being suspended over the cavity by the insulating material.

19 . The electromechanical switch of claim 16 wherein the drain region extends at least partially over the cavity and the cantilever is a flexible cantilever that is operable to contact the drain region in response to a voltage being applied to the gate.

20 . The electromechanical switch of claim 16 , further comprising a glass sealant between the source region and the first side of the gate and between the drain region and the second side of the gate.

Assignees

• St Microelectronics Inc

Inventors

• Liu Qing
• Zhang John H

Classifications

• H10P50/644

  Anisotropic liquid etching (H10P50/61 takes precedence) · CPC title

• H10P14/3411

  Silicon, silicon germanium or germanium · CPC title

• H01H2001/0084

  with perpendicular movement of the movable contact relative to the substrate · CPC title

• H01H1/0094

  Switches making use of nanoelectromechanical systems [NEMS] · CPC title

• H01H50/005

  using micromechanics · CPC title