Neural network computation circuit, control circuit therefor, and control method therefor
US-2024411520-A1 · Dec 12, 2024 · US
US2018174635A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2018174635-A1 |
| Application number | US-201715703548-A |
| Country | US |
| Kind code | A1 |
| Filing date | Sep 13, 2017 |
| Priority date | Dec 16, 2016 |
| Publication date | Jun 21, 2018 |
| Grant date | — |
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A magnetic memory includes: first to third terminals; a conductive layer including first to fifth regions, the first region being electrically connected to the first terminal, the fifth region being electrically connected to the second terminal, and the third region being electrically connected to the third terminal; a first magnetoresistive element including a first magnetic layer, a second magnetic layer disposed between the second region and the first magnetic layer, and a first nonmagnetic layer disposed between the first and the second magnetic layer; a second magnetoresistive element including a third magnetic layer, a fourth magnetic layer disposed between the fourth region and the third magnetic layer, and a second nonmagnetic layer disposed between the third and the fourth magnetic layer; and a circuit flowing a write current between the first and the second terminal and between the second and the third terminal in a write operation.
Opening claim text (preview).
1 . A magnetic memory comprising: a first terminal, a second terminal, and a third terminal; a first conductive layer including first to fifth regions, the second region being between the first region and the fifth region, the third region being between the second region and the fifth region, the fourth region being between the third region and the fifth region, the first region being electrically connected to the first terminal, the fifth region being electrically connected to the second terminal, and the third region being electrically connected to the third terminal; a first magnetoresistive element disposed corresponding to the second region, the first magnetoresistive element including a first magnetic layer, a second magnetic layer disposed between the second region and the first magnetic layer, a first nonmagnetic layer disposed between the first magnetic layer and the second magnetic layer, and a fourth terminal electrically connected to the first magnetic layer; a second magnetoresistive element disposed corresponding to the fourth region, the second magnetoresistive element including a third magnetic layer, a fourth magnetic layer disposed between the fourth region and the third magnetic layer, a second nonmagnetic layer disposed between the third magnetic layer and the fourth magnetic layer, and a fifth terminal electrically connected to the third magnetic layer; and a circuit configured to flow a write current between the first terminal and the third terminal and between the second terminal and the third terminal in a write operation. 2 . The magnetic memory according to claim 1 , wherein the circuit applies a same potential to the fourth terminal and the fifth terminal in the write operation. 3 . The magnetic memory according to claim 1 , wherein the circuit applies a voltage between the fourth terminal and the fifth terminal, and performs a read operation based on a potential of the third terminal. 4 . The magnetic memory according to claim 1 , wherein the third terminal is disposed on the first conductive layer on an opposite side to a side on which the first magnetoresistive element and the second magnetoresistive element are disposed. 5 . The magnetic memory according to claim 4 , further comprising a third magnetoresistive element disposed corresponding to the third region on an opposite side to a side on which the third terminal is disposed, the third magnetoresistive element including a fifth magnetic layer, a sixth magnetic layer disposed between the third region and the fifth magnetic layer, and a third nonmagnetic layer disposed between the fifth magnetic layer and the sixth magnetic layer. 6 . The magnetic memory according to claim 4 , further comprising a second conductive layer having a higher conductivity than the first conductive layer, the second conductive layer being disposed on the third region on an opposite side to the third terminal. 7 . The magnetic memory according to claim 1 , wherein the third terminal is disposed on the third region of the first conductive layer on the same side as a side on which the first magnetoresistive element and the second magnetoresistive element are disposed. 8 . The magnetic memory according to claim 7 , wherein at least one of the first terminal, the second terminal, and the third terminal includes a metal magnetic layer. 9 . The magnetic memory according to claim 1 , wherein the circuit flows a read current between the third terminal and the fourth terminal and between the third terminal and the fifth terminal, and performs a read operation on the basis of a potential difference or a current difference between the fourth terminal and the fifth terminal. 10 . The magnetic memory according to claim 1 , wherein the first terminal and the second terminal are electrically connected with each other. 11 . The magnetic memory according to claim 1 , further comprising a magnetic field application device, wherein the second magnetic layer and the fourth magnetic layer have a perpendicular magnetic anisotropy, and the magnetic field application device applies a first magnetic field to the second magnetic layer and a second magnetic field to the fourth magnetic layer, the first magnetic field including a first component and the second magnetic field including a second component, the first component and the second component being perpendicular to a layer stacking direction of the first magnetoresistive element and the second magnetoresistive element. 12 . The magnetic memory according to claim 1 , further comprising a magnetic field application device, wherein the second magnetic layer and the fourth magnetic layer have an in-plane magnetic anisotropy, and the magnetic field application device applies a first magnetic field to the second magnetic layer and a second magnetic field to the fourth magnetic layer, the first magnetic field including a first component and the second magnetic field including a second component, the first component and the second component being parallel to a layer stacking direction of the first magnetoresistive element and the second magnetoresistive element. 13 . The magnetic memory according to claim 1 , wherein the second magnetic layer and the fourth magnetic layer have an in-plane magnetic anisotropy, and an angle made by an easy magnetization axis of each of the second magnetic layer and the fourth magnetic layer and a direction in which the write current flows is more than 0 degree and less than 45 degrees. 14 . A magnetic memory comprising: a first terminal, a second terminal, and a third terminal; a conductive layer including first to fifth regions, the second region being between the first region and the fifth region, the third region being between the second region and the fifth region, the fourth region being between the third region and the fifth region, the first region being electrically connected to the first terminal, the fifth region being electrically connected to the second terminal, and the third region being electrically connected to the third terminal; a first magnetoresistive element disposed corresponding to the second region, the first magnetoresistive element including a first magnetic layer, a second magnetic layer disposed between the second region and the first magnetic layer, a first nonmagnetic layer disposed between the first magnetic layer and the second magnetic layer, and a fourth terminal electrically connected to the first magnetic layer; a second magnetoresistive element disposed corresponding to the fourth region, the second magnetoresistive element including a third magnetic layer, a fourth magnetic layer disposed between the fourth region and the third magnetic layer, a second nonmagnetic layer disposed between the third magnetic layer and the fourth magnetic layer, and a fifth terminal electrically connected to the third magnetic layer; a circuit configured to flow a write current between the first terminal and the second terminal in a write operation; and a magnetic field application device configured to apply a first magnetic field to the second magnetic layer and a second magnetic field to the fourth magnetic layer, the first magnetic field including a first component and the second magnetic field including a second component, the first component and the second component being perpendicular to a layer stacking direction of the first magnetoresistive element and the second magnetoresistive element, the first component and the second component being in opposite directions each other. 15 . The magnetic memory according to claim 14 , wherein the circuit applies a voltage to the fourth te
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