Method for manufacturing wiring pattern, method for manufacturing conductive film, and method for manufacturing transistor

Patent metadata

Field	Value
Publication number	US-2018171482-A1
Application number	US-201815895626-A
Country	US
Kind code	A1
Filing date	Feb 13, 2018
Priority date	Aug 19, 2015
Publication date	Jun 21, 2018
Grant date	—

Abstract

It is an object to provide a technique for obtaining a wiring pattern by electroless plating without using a lift-off process. A method for manufacturing a wiring pattern characteristically includes: a base layer forming step of forming an base layer including a catalyst for electroless plating and a resin; a surface layer removing step of removing at least a part of a surface layer of the base layer; and a plating layer forming step of performing electroless plating and forming a plating layer on the base layer subjected to the surface layer removing step.

First claim

1 . A method for manufacturing a wiring pattern, the method comprising:
a base layer forming step of forming an base layer comprising a catalyst for electroless plating and a resin; a surface layer removing step of removing at least a part of a surface layer of the base layer; and a plating layer forming step of performing electroless plating and forming a plating layer on the base layer subjected to the surface layer removing step, wherein a precursor for the resin is water-soluble.

2 . The method for manufacturing a wiring pattern according to claim 1 , wherein,
in the base layer forming step, the base layer is formed by applying a solution comprising the catalyst for electroless plating and the precursor for the resin, and curing the precursor for the resin into a predetermined pattern.

3 . The method for manufacturing a wiring pattern according to claim 2 , wherein
the precursor for the resin is cured by irradiation with light comprising light with a predetermined wavelength.

4 . The method for manufacturing a wiring pattern according to claim 3 , wherein
the precursor for the resin is cured by irradiation with light comprising the light with the predetermined wavelength through a mask with an opening corresponding to the predetermined pattern.

5 . The method for manufacturing a wiring pattern according to claim 1 , wherein
in the surface layer removing step, a surface of the base layer is irradiated with plasma.

6 . The method for manufacturing a wiring pattern according to claim 1 , wherein
in the surface layer removing step, an alkaline solution is brought into contact with the base layer.

7 . The method for manufacturing a wiring pattern according to claim 1 , wherein
the catalyst for electroless plating comprises at least one of palladium, copper, nickel, iron, platinum, and silver.

8 . The method for manufacturing a wiring pattern according to claim 1 , wherein
in the base layer forming step, the base layer is formed on a substrate comprising a resin material.

9 . The method for manufacturing a wiring pattern according to claim 8 , wherein
the base layer forming step, the surface layer removing step, and the plating layer forming step are performed at a temperature lower than a softening point of the substrate.

10 . A method for manufacturing a conductive film, wherein
the conductive film is manufactured by using the method for manufacturing a wiring pattern according to claim 1 .

11 . A method for manufacturing a transistor comprising a gate electrode, a source electrode, a drain electrode, a semiconductor layer, and a gate insulating layer, wherein
at least one of the gate electrode, the source electrode, and the drain electrode is manufactured by the method for manufacturing a wiring pattern according to claim 1 .

Assignees

• Nikon Corp

Inventors

• Koizumi Shohei
• Kawakami Yusuke

Classifications

• C23C18/1608 Primary

  from pretreatment step, i.e. selective pre-treatment · CPC title

• C23C18/1653

  Two or more layers with at least one layer obtained by electroless plating and one layer obtained by electroplating · CPC title

• H05K3/244

  Finish plating of conductors, especially of copper conductors, e.g. for pads or lands (selective plating methods H05K3/243; finish plating of conductors made by printing techniques H05K3/246; solder as finish H05K3/3465) · CPC title

• H01L51/0021

  Electricity · mapped topic

• H05K3/184

  using masks · CPC title