Method of manufacturing a semiconductor device

US2018166290A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2018166290-A1
Application numberUS-201715814999-A
CountryUS
Kind codeA1
Filing dateNov 16, 2017
Priority dateDec 14, 2016
Publication dateJun 14, 2018
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

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Provided is a method of manufacturing a semiconductor device with which a trench shape having vertical, flat, and smooth side wall surfaces can be formed even at room temperature. A semiconductor substrate is placed on a sample stage which is kept at room temperature in a reaction container. A trench is formed in the semiconductor substrate by plasma etching that uses etching gas including oxygen and sulfur hexafluoride, while controlling the gas ratio of oxygen to sulfur hexafluoride so that the gas ratio is from 70% to 100%.

First claim

Opening claim text (preview).

What is claimed is: 1 . A method of manufacturing a semiconductor device in which a trench is formed on a semiconductor substrate, comprising: forming a mask of inorganic substance on a front surface of a semiconductor substrate so that the mask has an opening in a portion in which a trench is formed; controlling a temperature of a sample stage in a reaction container of an etching machine so as to keep the sample stage temperature constant; putting the semiconductor substrate on the sample stage; introducing etching gas including oxygen and sulfur hexafluoride to an interior of the reaction container while maintaining a flow rate ratio of oxygen to sulfur hexafluoride between 70% and 100%; and performing plasma etching of the semiconductor substrate with the etching gas to form the trench. 2 . A method of manufacturing a semiconductor device in which a trench is formed in a semiconductor substrate, comprising: forming a mask from inorganic substance on a front surface of a semiconductor substrate so that the mask has an opening in a portion in which the trench is formed; controlling a temperature of a sample stage in a reaction container of an etching machine so as to keep the sample stage temperature constant; putting the semiconductor substrate on the sample stage; introducing etching gas including oxygen and sulfur hexafluoride to an interior of the reaction container while setting a flow rate ratio of oxygen to sulfur hexafluoride to a first ratio; a first etching step of performing plasma etching on the semiconductor substrate with the etching gas at the first ratio; introducing, after the first etching step, the etching gas including oxygen and sulfur hexafluoride to the interior of the reaction container while setting the flow rate ratio of oxygen to sulfur hexafluoride to a second ratio which is lower than the first ratio; and a second etching step of performing plasma etching on the semiconductor substrate with the etching gas at the second ratio. 3 . A method of manufacturing a semiconductor device according to claim 2 , wherein the first ratio and the second ratio which are flow rate ratios of oxygen to sulfur hexafluoride as the etching gas are between 70% and 100%. 4 . A method of manufacturing a semiconductor device in which a trench is formed in a semiconductor substrate, comprising: forming a mask from inorganic substance on a front surface of a semiconductor substrate so that the mask has an opening in a portion in which the trench is formed; controlling a temperature of a sample stage in a reaction container of an etching machine so as to keep the sample stage temperature constant; putting the semiconductor substrate on the sample stage; performing plasma etching by introducing etching gas including oxygen and sulfur hexafluoride to an interior of the reaction container while setting a flow rate ratio of oxygen to sulfur hexafluoride to a first ratio; and continuing plasma etching by introducing the etching gas to the interior of the reaction container while changing the flow rate ratio of oxygen to sulfur hexafluoride to a second ratio which is lower than the first ratio in a single step instead of in stages. 5 . A method of manufacturing a semiconductor device according to claim 4 , wherein the first ratio and the second ratio which are flow rate ratios of oxygen to sulfur hexafluoride as the etching gas are between 70% and 100%. 6 . A method of manufacturing a semiconductor device according to claim 1 , wherein a sum of flow rates of the etching gas is constant. 7 . A method of manufacturing a semiconductor device according to claim 1 , wherein the temperature is from 5° C. to 30° C. 8 . A method of manufacturing a semiconductor device according to claim 1 , wherein the etching gas including oxygen and sulfur hexafluoride comprises only oxygen and sulfur hexafluoride. 9 . A method of manufacturing a semiconductor device according to claim 2 , wherein the etching gas including oxygen and sulfur hexafluoride comprises only oxygen and sulfur hexafluoride. 10 . A method of manufacturing a semiconductor device according to claim 3 , wherein the etching gas including oxygen and sulfur hexafluoride comprises only oxygen and sulfur hexafluoride. 11 . A method of manufacturing a semiconductor device according to claim 4 , wherein the etching gas including oxygen and sulfur hexafluoride comprises only oxygen and sulfur hexafluoride. 12 . A method of manufacturing a semiconductor device according to claim 5 , wherein the etching gas including oxygen and sulfur hexafluoride comprises only oxygen and sulfur hexafluoride. 13 . A method of manufacturing a semiconductor device according to claim 6 , wherein the etching gas including oxygen and sulfur hexafluoride comprises only oxygen and sulfur hexafluoride. 14 . A method of manufacturing a semiconductor device according to claim 7 , wherein the etching gas including oxygen and sulfur hexafluoride comprises only oxygen and sulfur hexafluoride.

Assignees

Inventors

Classifications

  • for drying etching · CPC title

  • characterised by the process involved to create the mask, e.g. lift-off masks or sidewalls or to modify the mask · CPC title

  • H10P50/242Primary

    of Group IV materials · CPC title

  • Microwave generated discharge (H01J37/32357, H01J37/32366, H01J37/32394, H01J37/32403 take precedence) · CPC title

  • containing a fluorine compound · CPC title

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What does patent US2018166290A1 cover?
Provided is a method of manufacturing a semiconductor device with which a trench shape having vertical, flat, and smooth side wall surfaces can be formed even at room temperature. A semiconductor substrate is placed on a sample stage which is kept at room temperature in a reaction container. A trench is formed in the semiconductor substrate by plasma etching that uses etching gas including oxyg…
Who is the assignee on this patent?
Sii Semiconductor Corp
What technology area does this patent fall under?
Primary CPC classification H10P50/242. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Jun 14 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).