Multi-radiofrequency impedance control for plasma uniformity tuning

Patent metadata

Field	Value
Publication number	US-2018166256-A1
Application number	US-201815882429-A
Country	US
Kind code	A1
Filing date	Jan 29, 2018
Priority date	Mar 28, 2012
Publication date	Jun 14, 2018
Grant date	—

Abstract

Circuits, methods, chambers, systems, and computer programs are presented for processing wafers. A wafer processing apparatus includes top and bottom electrodes inside a processing chamber; a first, second, third, and fourth radio frequency (RF) power sources; and one or more resonant circuits. The first, second, and third RF power sources are coupled to the bottom electrode. The top electrode may be coupled to the fourth RF power source, to electrical ground, or to the one or more resonant circuits. Each of the one or more resonant circuits, which are coupled between the top electrode and electrical ground, include a tune-in element operable to vary a frequency-dependent impedance presented by the resonant circuit. The wafer processing apparatus is configurable to select the RF power sources for wafer processing operations, as well as the connections to the top electrode in order to provide plasma and etching uniformity for the wafer.

First claim

What is claimed is:

1 . A wafer processing apparatus including a top electrode and a bottom electrode of a processing chamber, the wafer processing apparatus comprising:
a first radio frequency (RF) power source coupled between the bottom electrode and electrical ground, the first RF power source controlled by a first power controller; a second RF power source coupled between the bottom electrode and ground, the second RF power source controlled by a second power controller; a third RF power source coupled between the bottom electrode and electrical ground, the third RF power source controlled by a third power controller, wherein the first, second and third RF power sources are coupled in parallel; a low frequency RF power source coupled to the top electrode; a first resonant circuit coupled between electrical ground and a first switch and the top electrode coupled in series, wherein a frequency-dependent impedance of the first resonant circuit is defined to present a maximum value at a frequency of the first RF power source, wherein the first switch operates to couple or uncouple the first resonant circuit to the top electrode; a second resonant circuit coupled between electrical ground and a second switch and the top electrode coupled in series, wherein a frequency-dependent impedance of the second resonant circuit is defined to present a maximum value at a frequency of the second RF power source, wherein the second switch operates to couple or uncouple the second resonant circuit to the top electrode; and a third resonant circuit coupled between electrical ground and a third switch and the top electrode coupled in series, wherein a frequency-dependent impedance of the third resonant circuit is defined to present a maximum value at a frequency of the third RF power source, wherein the third switch operates to couple or uncouple the third resonant circuit to the top electrode.

2 . The wafer processing apparatus of claim 1 , further comprising:
a fourth switch coupled between the top electrode and to electrical ground, wherein the fourth switch operates to connect or disconnect the top electrode to electric ground.

3 . The wafer processing apparatus of claim 1 , further comprising:
a filter coupled between the top electrode and the low frequency RF power source, wherein the filter blocks power from the bottom electrode from reaching the low frequency RF power source.

4 . The wafer process apparatus of claim 1 , wherein the fourth switch operates to bypass or pass through to the first, second and third resonant circuits as controlled by operation of the first, second and third switches.

5 . The wafer process apparatus of claim 1 , further comprising:
a power and impedance controller being operable to couple or uncouple the first resonant circuit to the top electrode by controlling the first switch, the power and impedance controller being operable to couple or uncouple the second resonant circuit to the top electrode by controlling the second switch, the power and impedance controller being operable to couple or uncouple the third resonant circuit to the top electrode by controlling the third switch.

6 . The wafer process apparatus of claim 5 ,
wherein the system controller is operable to control the first power controller, the second power controller and the third power controller, wherein the system controller is operable to set each of the first, second, and third RF power sources to be one of turned on or turned off independently during a wafer processing operation.

7 . The wafer process apparatus of claim 6 ,
wherein the first RF power source is settable to a frequency of 60 MHz; wherein the second RF power source is settable to a frequency of 27 MHz; wherein the third RF power source is settable to a frequency of 2 MHz.

8 . The wafer process apparatus of claim 6 ,
the system controller being operable to control the power and impedance controller, the system controller being operable to set the low frequency RF power source to be one of turned on or turned off during the wafer processing operation.

9 . The wafer process apparatus of claim 8 ,
wherein the frequency of the fixed frequency RF power source is settable to 400 KHz.

10 . The wafer process apparatus of claim 1 , further comprising:
a first match circuit coupled between the first RF power source and the bottom electrode; a second match circuit coupled between the second RF power source and the bottom electrode; a third match circuit coupled between the third RF power source and the bottom electrode; and a fourth match circuit coupled between the top electrode and the low frequency RF power source.

11 . A wafer processing apparatus including a top electrode and a bottom electrode of a processing chamber, the wafer processing apparatus comprising:
a first radio frequency (RF) power source, a second RF power source, and a third RF power source, the first, second, and third RF power sources being coupled to the bottom electrode; a first resonant circuit coupled between the top electrode and electrical ground, wherein a frequency-dependent impedance of the first resonant circuit is defined to present a maximum value at a frequency of the first RF power source; and a second resonant circuit coupled between the top electrode and electrical ground, wherein a frequency-dependent impedance of the second resonant circuit is defined to present a maximum value at a frequency of the second RF power source.

12 . The wafer processing apparatus of claim 11 , further comprising:
a low frequency RF power source coupled to the top electrode.

13 . The wafer processing apparatus of claim 12 , further comprising:
a filter coupled between the top electrode and the low frequency RF power source, wherein the filter blocks power from the bottom electrode from reaching the low frequency RF power source.

14 . The wafer processing apparatus of claim 11 , further comprising:
a system controller being operable to set each of the first, second, and third RF power sources to be one of turned on or turned off independently, such that only one of the first, second and third RF power sources is coupled to the bottom electrode at a time.

15 . The wafer processing apparatus of claim 11 ,
wherein the first RF power source is settable to a frequency of 2 MHz; wherein the second RF power source is settable to a frequency of 60 MHz.

16 . The wafer processing apparatus of claim 15 , wherein the third RF power source is settable to a frequency of 27 MHz.

17 . The wafer processing apparatus of claim 11 ,
wherein the first RF power source is settable to a frequency of 27 MHz; wherein the second RF power source is settable to a frequency of 60 MHz; wherein the third RF power source is settable to a frequency of 2 MHz.

18 . A method for processing a wafer in a wafer processing apparatus including a top electrode and a bottom electrode of a processing chamber, the method comprising:
receiving a recipe for processing the wafer; enabling or disabling each of a first radio frequency (RF) power, a second RF power, a third RF power, and a fourth RF power based on the recipe, the first RF power, the second RF power, and the third RF power being coupled to the bottom electrode; setting a position of a first switch based on the recipe to couple or decouple the top electrode to the fourth RF power; setting a position of a second switch based on the recipe to couple or decouple the top electrode to a first resonant circuit; setting a position of a third swit

Assignees

• Lam Res Corp

Inventors

• Marakhtanov Alexei
• Dhindsa Rajinder

Classifications

• H01J37/32165

  Plural frequencies · CPC title

• H01J37/32091 Primary

  the radio frequency energy being capacitively coupled to the plasma · CPC title

• H10P50/242 Primary

  of Group IV materials · CPC title

• H03H7/40

  Automatic matching of load impedance to source impedance · CPC title

• H05H1/46

  using applied electromagnetic fields, e.g. high frequency or microwave energy (H05H1/26 takes precedence) · CPC title