Interconnect structure and method for on-chip information transfer

Patent metadata

Field	Value
Publication number	US-2018151802-A1
Application number	US-201715820627-A
Country	US
Kind code	A1
Filing date	Nov 22, 2017
Priority date	Nov 25, 2016
Publication date	May 31, 2018
Grant date	—

Abstract

An interconnect structure for on-chip information transfer, and a method for on-chip information transfer. The interconnect structure comprises a source configured for electrically generating plasmons; a detector configured for electrically detecting the generated plasmons; and a plasmonic waveguide coupled between the source and the detector.

First claim

What is claimed is:

1 . An interconnect structure for on-chip information transfer, comprising:
a source configured for electrically generating plasmons; a detector configured for electrically detecting the generated plasmons; and a plasmonic waveguide coupled between the source and the detector.

2 . The interconnect structure of claim 1 , wherein the source comprises a metal-insulator-metal (MIM) junction.

3 . The interconnect structure of claim 2 , wherein the MIM junction is configured for generating the plasmons via bias induced tunneling.

4 . The interconnect structure of claim 1 , wherein the detector comprises a metal-insulator-metal (MIM) junction.

5 . The interconnect structure of claim 4 , wherein the MIM junction is configured for detecting the generated plasmons via a modified tunnel-current under bias induced tunneling.

6 . The interconnect structure of claim 1 , wherein the plasmonic waveguide comprises a first portion configured for propagating surface plasmon polaritons (SPPs) excited in the source.

7 . The interconnect structure of claim 6 , wherein the plasmonic waveguide comprises a second portion configured for coupling the SPPs to a long range SPP (LRSPP) mode of the second portion and propagation of LRSPPs.

8 . The interconnect structure of claim 7 , wherein the second portion of the plasmonic waveguide comprises two sections separated by a gap configured for electrical isolation of the source and detector while preserving the propagation of the LRSPPs.

9 . The interconnect structure of claim 8 , wherein the second portion of the plasmonic waveguide has a smaller thickness than the first portion.

10 . The interconnect structure of claim 8 , wherein the plasmonic waveguide comprises a third portion configured for coupling the LRSPPs to an SPP mode of the third portion for detection of the SPPs in the detector.

11 . The interconnect structure of claim 10 , wherein the third portion of the plasmonic waveguide has a larger thickness than the second portion.

12 . The interconnect structure of claim 1 , wherein the plasmonic waveguide comprises a insulator-metal-insulator (IMI) plasmonic waveguide.

13 . The interconnect structure of claim 1 , wherein the plasmonic waveguide has a length of up to about 1 mm, preferably in the range from about 100 μm to 1 mm.

14 . The interconnect structure of claim 1 , wherein the source, the detector and the plasmonic waveguide are formed on the same substrate.

15 . A method for on-chip information transfer, the method comprising the steps of:
electrically generating plasmons; electrically detecting the generated plasmons; and propagating the plasmons in a plasmonic waveguide coupled between the source and the detector.

16 . The method of claim 15 , comprising generating the plasmons via bias induced tunneling.

17 . The method of claim 15 , comprising detecting the generated plasmons via a modified tunnel-current under bias induced tunneling.

18 . The method of claim 15 , comprising propagating surface plasmon polaritons (SPPs) excited in the source in a first portion of plasmonic waveguide.

19 . The method of claim 18 , comprising coupling the SPPs to a long range SPP (LRSPP) mode of a second portion of the plasmonic waveguide and propagating the LRSPPs.

20 . The method of claim 19 , comprising providing a gap in the second portion of the plasmonic waveguide for electrical isolation of the source and detector while preserving the propagation of the LRSPPs, preferably comprising coupling the LRSPPs to an SPP mode of a third portion of the plasmonic waveguide for detection of the SPPs in the detector.

Assignees

• Nat Univ Singapore

Inventors

• Du Wei
• Wang Tao
• Nijhuis Christian Albertus

Classifications

• H10W44/216

  Waveguides, e.g. strip lines · CPC title

• H10W44/20

  at high-frequency [HF] or radio frequency [RF] · CPC title

• H10W72/00

  Interconnections or connectors in packages · CPC title

• G02B6/1226 Primary

  involving surface plasmon interaction · CPC title

• H01L23/66

  Electricity · mapped topic