Substrate Features for Enhanced Fluidic Assembly of Electronic Devices

Patent metadata

Field	Value
Publication number	US-2018145207-A1
Application number	US-201815859672-A
Country	US
Kind code	A1
Filing date	Jan 1, 2018
Priority date	Sep 15, 2016
Publication date	May 24, 2018
Grant date	—

Abstract

Embodiments are related to systems and methods for fluidic assembly, and more particularly to systems and methods for assuring deposition of elements in relation to a substrate.

First claim

What is claimed is:

1 . A fluidic assembly system, the system comprising:
a substrate including a plurality of polygonal wells, wherein each of the polygonal wells has a sidewall defining an polygonal outer perimeter of the respective polygonal well and extending from one surface of the substrate to a depth within the substrate, and wherein each of the polygonal wells is sized to accept a single disk shaped device.

2 . The system of claim 1 , wherein a through hole via extends from at least one of the plurality of polygonal wells through the substrate to another surface of the substrate.

3 . The system of claim 2 , wherein the disk shaped device is a diode structure of a post enhanced diode, wherein the post enhanced diode includes a post extending from a surface of the diode structure, and wherein the post is incapable of insertion in the through hole via when the post enhanced diode is deposited in the at least one of the plurality of wells.

4 . The system of claim 3 , wherein a width of the through hole via is less than a width of the post.

5 . The system of claim 3 , wherein the through hole via is offset from the post such that when the post enhanced diode is deposited in the well in an inverted orientation the post is incapable of insertion in the through hole via.

6 . The system of claim 3 , wherein the through hole via is offset from a center location of the bottom of the at least one of the plurality of polygonal wells.

7 . The system of claim 3 , wherein the post is offset from a center location of the top surface of the diode structure.

8 . The system of claim 3 , wherein the post is selected from a group consisting of: a metallic post, and a non-metallic post.

9 . The system of claim 3 , wherein the post is selected from a group consisting of: a conductive post, and a non-conductive post.

10 . The system of claim 1 , wherein the through hole via extends from an out of boundary area of the at least one of the plurality of wells, wherein the out of boundary area incapable of being fully covered by the diode structure when the post enhanced diode is deposited in the well in a non-inverted orientation.

11 . A fluidic assembly substrate, the substrate comprising:
a plurality of wells each including:
a well opening at a first surface of the substrate, wherein the well opening has a first cross-sectional area;
a through hole via having a via opening with a second cross-sectional area, wherein the through hole via extends from the well to a second surface of the substrate, wherein the second cross-sectional area is less than the first cross-sectional area; and
wherein the through hole via is located below the first cross-sectional area such that a post of a post enhanced diode is incapable of insertion into the through hole via when at least a portion of a diode structure of the post enhanced diode and a portion of the post of the post enhanced diode are deposited in the well.

12 . The system of claim 11 , wherein a cross-sectional shape of the well parallel to the first surface is a polygon.

13 . The substrate of claim 11 , wherein the post of the post enhanced diode is substantially centered on the diode structure of the post enhanced diode, and wherein the through hole via is offset from a center of the well.

14 . The substrate of claim 11 , wherein the through hole via extends from an out of boundary area of the well, wherein the out of boundary area incapable of being fully covered by the diode structure when the post enhanced diode is deposited in the well with the post directed away from the second surface of the substrate.

15 . The substrate of claim 14 , wherein the well has a tear drop shape including a circular region and a triangular region, and wherein the out of boundary area includes a portion of the triangular region.

16 . The system of claim 11 , wherein a third cross-sectional area of the post is greater than the second cross-sectional area of the through hole via.

17 . The substrate of claim 11 , wherein the well is a first well of the plurality of wells, wherein the first well is joined with a second well of the plurality of wells to make a multi-well structure, and wherein the post enhanced diode may be deposited in a non-inverted orientation in the first well such that it cannot move into the other well without being completely removed from the well.

18 . The substrate of claim 17 , wherein the through hole via is shared between the first well and the second well, and wherein the through hole via extends below a junction of the first well and the second well.

19 . A fluidic assembly system, the system comprising:
a plurality of post enhanced diodes, wherein each of the post enhanced diodes include a diode structure and a post extending from the diode structure; a substrate including a plurality of wells, wherein each of the wells has:
a sidewall defining an outer perimeter of the well and extending from a first surface of the substrate to a depth within the substrate, and wherein each of the wells is sized to accept a single post enhanced diode;
a through hole via having extending from the well to a second surface of the substrate; and
wherein the through hole via is located below the first cross-sectional area such that a post of a post enhanced diode is incapable of insertion into the through hole via when at least a portion of a diode structure of the post enhanced diode is deposited in the well.

20 . The system of claim 19 , wherein a cross-sectional shape of the well parallel to the first surface is a polygon.

21 . The system of claim 19 , wherein the well is a first well of the plurality of wells, wherein the first well is joined with a second well of the plurality of wells to make a multi-well structure, and wherein the post enhanced diode may be deposited in a non-inverted orientation in the first well such that it cannot move into the other well without being completely removed from the well.

22 . The system of claim 21 , wherein the through hole via is shared between the first well and the second well, and wherein the through hole via extends below a junction of the first well and the second well.

23 . The system of claim 19 , wherein the through hole via extends from an out of boundary area of the well, wherein the out of boundary area incapable of being fully covered by the diode structure when the post enhanced diode is deposited in the well in a non-inverted orientation.

24 . The system of claim 23 , wherein the well has a tear drop shape including a circular region and a triangular region, and wherein the out of boundary area includes a portion of the triangular region.

Assignees

• Sharp Laboratories America Inc

Inventors

• Heine David Robert
• Garner Sean Mathew
• Shinde Avinash Tukaram

Classifications

• H10W72/0198

  batch processes · CPC title

• H10W90/00

  Package configurations · CPC title

• H01L33/005 Primary

  Electricity · mapped topic

• H01L33/32

  Electricity · mapped topic

• H01L33/06

  Electricity · mapped topic