Optoelectronic semiconductor chip
US-9647174-B2 · May 9, 2017 · US
US2018144933A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2018144933-A1 |
| Application number | US-201615573468-A |
| Country | US |
| Kind code | A1 |
| Filing date | May 11, 2016 |
| Priority date | May 15, 2015 |
| Publication date | May 24, 2018 |
| Grant date | — |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A method for procuring a nitride compound semiconductor device is disclosed. In an embodiment the method includes growing a first nitride compound semiconductor layer onto a growth substrate, depositing a masking layer, growing a second nitride compound semiconductor layer onto the masking layer, growing a third nitride compound semiconductor layer onto the second nitride compound semiconductor layer such that the third nitride compound semiconductor layer has non-planar structures and growing a fourth nitride compound semiconductor layer onto the non-planar structures such that the fourth nitride compound semiconductor layer has an essentially planar surface. The method further includes growing a functional layer sequence of the nitride compound semiconductor device, connecting a side of the functional layer sequence located opposite to the growth substrate to a carrier and removing the growth substrate.
Opening claim text (preview).
1 - 14 . (canceled) 15 . A method for producing a nitride compound semiconductor device, the method comprising: growing a first nitride compound semiconductor layer onto a growth substrate; depositing a masking layer; growing a second nitride compound semiconductor layer onto the masking layer; growing a third nitride compound semiconductor layer onto the second nitride compound semiconductor layer such that the third nitride compound semiconductor layer has non-planar structures; growing a fourth nitride compound semiconductor layer onto the non-planar structures such that the fourth nitride compound semiconductor layer has an essentially planar surface; growing a functional layer sequence of the nitride compound semiconductor device; connecting a side of the functional layer sequence located opposite to the growth substrate to a carrier; removing the growth substrate; and producing coupling-out structures on a surface of the nitride compound semiconductor device facing away from the carrier by an etching process which removes at least part of the first, second and third nitride compound semiconductor layers. 16 . The method according to claim 15 , wherein the non-planar structures are pyramidal structures. 17 . The method according to claim 15 , wherein the non-planar structures include side facets which are constituted by a [1-101] crystal face or an [11-22] crystal face. 18 . The method according to claim 15 , wherein at least part of the coupling-out structures are constituted by a [1-101] crystal face or an [11-22] crystal face. 19 . The method according to claim 15 , wherein the non-planar structures have an average height of between 1 μm and 5 μm. 20 . The method according to claim 15 , wherein the etching process is a wet chemical etching process. 21 . The method according to claim 15 , wherein the second nitride compound semiconductor layer and/or the fourth nitride compound semiconductor layer are produced at a growth temperature higher than 1,050° C. 22 . The method according to claim 15 , wherein the third nitride compound semiconductor layer is produced at a growth temperature which is by at least 40° C. lower than the growth temperature of the second nitride compound semiconductor layer. 23 . The method according to claim 15 , wherein the nitride compound semiconductor layers are produced by a metal organic vapor phase epitaxy, wherein NH 3 is used as a reaction gas, and wherein an NH 3 gas flow is at least 70% smaller in the formation of the second and third nitride compound semiconductor layers than in the formation of the fourth nitride compound semiconductor layer. 24 . The method according to claim 15 , wherein the masking layer is a silicon nitride layer. 25 . The method according to claim 15 , wherein the masking layer has a plurality of openings of an average lateral extent of between 100 nm and 1,000 nm. 26 . The method according to claim 15 , wherein the growth substrate is a sapphire substrate. 27 . The method according to claim 15 , wherein the functional layer sequence includes an n-type semiconductor region, a p-type semiconductor region, and an active layer disposed between the n-type semiconductor region and the p-type semiconductor region. 28 . The method according to claim 15 , wherein the nitride compound semiconductor device is a light-emitting diode. 29 . The method according to claim 15 , wherein the method steps are carried out in the order mentioned.
Nitrides · CPC title
Lateral overgrowth · CPC title
characterised by the preparation of substrate for selective deposition · CPC title
using chemical vapour deposition [CVD] · CPC title
Nitrides · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.