Encoding device, memory controller, communication system, and encoding method

Patent metadata

Field	Value
Publication number	US-2018143871-A1
Application number	US-201615736079-A
Country	US
Kind code	A1
Filing date	Apr 15, 2016
Priority date	Jul 24, 2015
Publication date	May 24, 2018
Grant date	—

Abstract

A data holding characteristic of a memory cell is improved in a memory system in which data is encoded and written to a memory cell.
A first candidate parity generation unit generates, as a first candidate parity, a parity for detecting an error in an information section in which a predetermined value is assigned in a predetermined variable area. A second candidate parity generation unit generates, as a second candidate parity, a parity for detecting an error in the information section in which a value different from the predetermined value is assigned in the predetermined variable area. A selection unit selects a parity that satisfies a predetermined condition from among the first and second candidate parities as a selection parity. An output unit outputs a codeword constituted by the information section corresponding to the selection parity and the selection parity.

First claim

1 . An encoding device comprising:
a first candidate parity generation unit that generates, as a first candidate parity, a parity for detecting an error in an information section in which a predetermined value is assigned in a predetermined variable area; a second candidate parity generation unit that generates, as a second candidate parity, a parity for detecting an error in the information section in which a value different from the predetermined value is assigned in the predetermined variable area; a selection unit that selects a parity that satisfies a predetermined condition from among the first and second candidate parities as a selection parity; and an output unit that outputs a codeword constituted by the information section corresponding to the selection parity and the selection parity.

2 . The encoding device according to claim 1 , wherein
the information section includes user data input to the first candidate parity generation unit and unused data including the predetermined variable area.

3 . The encoding device according to claim 2 , wherein
the selection unit includes: a first weight counter that counts, as a weight, the number of bits having a specific value in the first candidate parity and the unused data corresponding to the first candidate parity; a second weight counter that counts, as a weight, the number of bits having the specific value in the second candidate parity and the unused data corresponding to the second candidate parity; and a comparison unit that compares respective count values of the first and second weight counters and selects a parity that satisfies the predetermined condition on the basis of a result of the comparison.

4 . The encoding device according to claim 2 , further comprising a control unit that reads data written in a memory cell as pre-read data, wherein
the selection unit includes: a first rewrite bit depth counter that counts a bit depth of a value different from a value of the pre-read data as a rewrite bit depth in the first candidate parity and the unused data corresponding to the first candidate parity; a second rewrite bit depth counter that counts a bit depth of a value different from a value of the pre-read data as a rewrite bit depth in the second candidate parity and the unused data corresponding to the second candidate parity, and a comparison unit that compares the rewrite bit depths counted by the respective first and second rewrite bit depth counters and selects a parity that satisfies the predetermined condition on the basis of a result of the comparison.

5 . The encoding device according to claim 2 , further comprising a control unit that reads data written in a memory cell as pre-read data, wherein
the selection unit includes a first longest run counter that counts the number of consecutive bits having a value different from a value of bits of the pre-read data in the first candidate parity and the unused data corresponding to the first candidate parity and finds a maximum value of the count value as a length of a longest run, the selection unit further including: a second longest run counter that counts the number of consecutive bits having a value different from a value of bits of the pre-read data in the second candidate parity and the unused data corresponding to the second candidate parity and finds a maximum value of the count value as a length of a longest run; and a comparison unit that compares the lengths of the longest runs found by the respective first and second longest run number counters and selects a parity that satisfies the predetermined condition on the basis of a result of the comparison.

6 . The encoding device according to claim 2 , wherein the unused data is arranged between the user data and the selection parity in the codeword.

7 . The encoding device according to claim 2 , wherein the user data is arranged between the unused data and the selection parity in the codeword.

8 . The encoding device according to claim 2 , wherein the user data is arranged by being dispersed in a plurality of areas in the codeword.

9 . The encoding device according to claim 2 , wherein the unused data is arranged by being dispersed in a plurality of areas in the codeword.

10 . The encoding device according to claim 2 , wherein
the unused data is constituted by the variable area and a fixed area in which a value is not altered, and the second candidate parity generation unit generates the second candidate parity corresponding to the information section in which a value of the variable area has been altered.

11 . The encoding device according to claim 10 , wherein the variable area is arranged by being dispersed in a plurality of areas in the codeword.

12 . The encoding device according to claim 10 , wherein the fixed area is arranged by being dispersed in a plurality of areas in the codeword.

13 . The encoding device according to claim 1 , wherein
the first candidate parity generation unit generates the first candidate parity from the information section, and the second candidate parity generation unit generates the second candidate parity by a logical operation between the first candidate parity and a first parity pattern.

14 . The encoding device according to claim 13 , further comprising:
a third candidate parity generation unit that generates a third candidate parity by a logical operation between a second parity pattern and the first candidate parity; and a fourth candidate parity generation unit that generates a fourth candidate parity by a logical operation between the second parity pattern and the second candidate parity, wherein the selection unit selects a parity that satisfies the predetermined condition from among the first, second, third, and fourth candidate parities as the selection parity.

15 . The encoding device according to claim 1 , further comprising a user data conversion unit that performs conversion processing of converting a bit depth of a specific value in the user data and outputs either the user data after the conversion processing or the user data before the conversion processing to the first candidate parity generation unit, wherein
the first candidate parity generation unit generates the first candidate parity from the first information section including the output user data.

16 . A memory controller comprising:
a first candidate parity generation unit that generates, as a first candidate parity, a parity for detecting an error in an information section in which a predetermined value is assigned in a predetermined variable area; a second candidate parity generation unit that generates, as a second candidate parity, a parity for detecting an error in the information section in which a value different from the predetermined value is assigned in the predetermined variable area; a selection unit that selects a parity that satisfies a predetermined condition from among the first and second candidate parities as a selection parity; an output unit that outputs a codeword constituted by the information section corresponding to the selection parity and the selection parity to a memory cell as write data; and a decoding unit that reads read data from the memory cell and decodes the read data.

17 . A communication system comprising:
a first candidate parity generation unit that generates, as a first candidate parity, a parity for detecting an error in an information section in which a predetermined value is assigned in a predetermined variable area; a second candidate parity generation unit that generates, as a second candidate parit

Assignees

• Sony Corp

Inventors

• Shinbashi Tatsuo
• Nakanishi Kenichi
• Fujinami Yasushi
• Iwaki Hiroyuki
• Ishii Ken
• Okubo Hideaki

Classifications

• H03M13/09

  Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit · CPC title

• H03M13/19

  Single error correction without using particular properties of the cyclic codes, e.g. Hamming codes, extended or generalised Hamming codes · CPC title

• H03M13/1515

  Reed-Solomon codes · CPC title

• G06F11/1012

  using codes or arrangements adapted for a specific type of error (G06F11/1048 takes precedence) · CPC title

• H03M13/35 Primary

  Unequal or adaptive error protection, e.g. by providing a different level of protection according to significance of source information or by adapting the coding according to the change of transmission channel characteristics · CPC title