Capacitor and method for manufacturing the capacitor

US2018114647A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2018114647-A1
Application numberUS-201715849850-A
CountryUS
Kind codeA1
Filing dateDec 21, 2017
Priority dateAug 7, 2015
Publication dateApr 26, 2018
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A capacitor having an element main body including a metal high specific surface area substrate which has fine pores formed therein and a large specific surface area; a dielectric layer formed in a prescribed region on the surface of the high specific surface area substrate including the inner surfaces of the pores; and a conductive part on the dielectric layer. A first terminal electrode is electrically connected to the high specific surface area substrate. A second terminal electrode is electrically connected to the conductive part. The dielectric layer is interposed between the conductive part and the high specific surface area substrate, and the high specific surface area substrate and the second terminal electrode are electrically insulated from each other.

First claim

Opening claim text (preview).

1 . A capacitor comprising: an element main body made of an electrical conductive material and having a plurality of pores formed therein; a dielectric layer in a prescribed region of a surface of the element main body including inner surfaces of the plurality of pores; a conductive part on the dielectric layer; a first terminal electrode electrically connected to the element main body; and a second terminal electrode electrically connected to the conductive part and electrically insulated from the first terminal electrode, wherein the dielectric layer is interposed between the conductive part and the high specific surface area substrate, and the element main body and the second terminal electrode are electrically insulated from each other. 2 . The capacitor according to claim 1 , wherein the dielectric layer is formed by being deposited in increments of an atomic layer. 3 . The capacitor according to claim 1 or 2 , wherein the conductive part extends into the plurality of pores. 4 . The capacitor according to claim 1 , wherein the conductive part extends along the dielectric layer inside the pores. 5 . The capacitor according to claim 1 , wherein the electrical conductive material is a metal material. 6 . The capacitor according to claim 1 , wherein the conductive part is any one of a metal material and a conductive compound. 7 . The capacitor according to claim 6 , wherein the conductive compound contains a metal nitride or a metal oxide nitride. 8 . The capacitor according to claim 1 , wherein a variation of a film thickness of the dielectric layer is 10% or less on an absolute value basis with reference to an average film thickness thereof. 9 . The capacitor according to claim 1 , further comprising a protective layer made of an insulating material covering at least side surface parts of the element main body. 10 . The capacitor according to claim 9 , further comprising a metal film interposed between the protective layer and the conductive part. 11 . The capacitor according to claim 1 , wherein the first terminal electrode and the second terminal electrode are located at respective ends of the element main body so as to be opposed to each other. 12 . The capacitor according to claim 1 , wherein the element main body has a first region that principally contributes to the acquisition of a capacitance and two second regions each having a smaller void ratio than the first region, and the two second regions are provided at respective opposed ends of the first region. 13 . A method for manufacturing a capacitor, the method comprising: preparing an aggregate substrate made of an electrical conductive material which has a plurality of pores formed therein; forming a dielectric layer in a prescribed region of a surface of the aggregate substrate including inner surfaces of the plurality of pores; forming a conductive part on the dielectric layer; separating the aggregate substrate into segments to obtain an element main body; forming a first terminal electrode so as to be electrically connected to the element main body; and forming a second terminal electrode so as to be electrically insulated from the element main body. 14 . The method for manufacturing a capacitor according to claim 13 , further comprising comparting the aggregate substrate into a plurality of regions, wherein the plurality of regions includes a first region that principally contributes to the acquisition of a capacitance and a second region having a smaller void ratio than the first region. 15 . The method for manufacturing a capacitor according to claim 14 , wherein the second region is produced by causing the destruction of a part of the plurality of pores of the aggregate substrate. 16 . The method for manufacturing a capacitor according to claim 14 , wherein the comparting step includes a pressing or laser irradiation treatment. 17 . The method for manufacturing a capacitor according to claim 13 , wherein during the segmenting, the aggregate substrate is cut with use of any one of laser irradiation and a cutting tool. 18 . The method for manufacturing a capacitor according to claim 13 , wherein the dielectric layer is formed by an atomic layer deposition method. 19 . The method for manufacturing a capacitor according to claim 13 , wherein the conductive part is formed by an atomic layer deposition method.

Assignees

Inventors

Classifications

  • the terminals embracing or surrounding the capacitive element, e.g. caps (H01G4/252 takes precedence) · CPC title

  • H01G4/33Primary

    Thin- or thick-film capacitors {(thin- or thick-film circuits; capacitors without a potential-jump or surface barrier specially adapted for integrated circuits, details thereof, multistep manufacturing processes therefor)} · CPC title

  • Inorganic dielectrics · CPC title

  • Electrodes · CPC title

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What does patent US2018114647A1 cover?
A capacitor having an element main body including a metal high specific surface area substrate which has fine pores formed therein and a large specific surface area; a dielectric layer formed in a prescribed region on the surface of the high specific surface area substrate including the inner surfaces of the pores; and a conductive part on the dielectric layer. A first terminal electrode is ele…
Who is the assignee on this patent?
Murata Manufacturing Co
What technology area does this patent fall under?
Primary CPC classification H01G4/33. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Apr 26 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).