Vertical vacuum channel transistor

Patent metadata

Field	Value
Publication number	US-2018102433-A1
Application number	US-201715693952-A
Country	US
Kind code	A1
Filing date	Sep 1, 2017
Priority date	Oct 6, 2016
Publication date	Apr 12, 2018
Grant date	—

Abstract

A method of fabricating features of a vertical transistor include performing a first etch process to form a first portion of a fin in a substrate; depositing a spacer material on sidewalls of the first portion of the fin; performing a second etch process using the spacer material as a pattern to elongate the fin and form a second portion of the fin in the substrate, the second portion having a width that is greater than the first portion; oxidizing a region of the second portion of the fin beneath the spacer material to form an oxidized channel region; and removing the oxidized channel region to form a vacuum channel.

First claim

What is claimed is:

1 . A vertical transistor, comprising:
a fin arranged on a source over a substrate; a drain arranged over the source such that the source and drain are arranged vertically with respect to one another; and a vacuum channel comprising an opening within the fin arranged between the source and the drain.

2 . The vertical transistor of claim 1 , wherein the source is a doped source region of the substrate.

3 . The vertical transistor of claim 1 , wherein the fin comprises a dopant that extends from the source to the drain.

4 . The vertical transistor of claim 1 , wherein the fin comprises a bottom portion below the vacuum channel and a top portion above the vacuum channel.

5 . The vertical transistor of claim 4 , wherein the bottom portion has a diameter that is greater than the top portion.

6 . The vertical transistor of claim 1 , wherein a gate stack is arranged only on one side of the fin.

7 . The vertical transistor of claim 6 , wherein an insulator is arranged on an opposing side of the fin between the source and the drain.

8 . The vertical transistor of claim 6 , wherein the vacuum channel contacts the gate stack.

9 . A vertical transistor, comprising:
a fin arranged on a source over a substrate, the fin having a first portion and a second portion, the second portion having a width that is greater than the first portion; a drain arranged over the source such that the source and drain are arranged vertically with respect to one another; and an oxidized region within the fin that is arranged between the source and the drain.

10 . The vertical transistor of claim 9 , wherein the source is a doped source region of the substrate.

11 . The vertical transistor of claim 9 , wherein the fin comprises a dopant that extends from the source to the drain.

12 . The vertical transistor of claim 9 , wherein the oxidized region comprises oxidized semiconductor material.

13 . The vertical transistor of claim 9 , wherein a gate stack is arranged only on one side of the fin.

14 . The vertical transistor of claim 9 , wherein the oxidized region is triangular shaped.

15 . The vertical transistor of claim 9 , wherein the oxidized region is arranged beneath a spacer.

16 . The vertical transistor of claim 9 , wherein the oxidized region comprises oxidized semiconductor material that is triangular shaped.

17 . The vertical transistor of claim 9 , further comprising another oxidized region within the fin adjacent to the oxidized region.

18 . The vertical transistor of claim 17 , wherein the oxidized region and another oxidized region are triangular shaped.

19 . The vertical transistor of claim 18 , wherein the oxidized region and another oxidized region are arranged beneath spacers on sidewalls of the fin.

20 . The vertical transistor of claim 9 , further comprising an oxide arranged on and around the fin.

Assignees

• IBM
• Globalfoundries Inc
• St Microelectronics Inc

Inventors

• Liu Qing
• Xie Ruilong
• Yeh Chun-Chen

Classifications

• H10P95/90

  Thermal treatments, e.g. annealing or sintering · CPC title

• H10P50/642

  Chemical etching · CPC title

• H10P14/203

  using transformation of metal, e.g. oxidation or nitridation · CPC title

• H01L21/30604

  Electricity · mapped topic

• H01L29/66553

  Electricity · mapped topic