Three capacitor stack and associated methods

Patent metadata

Field	Value
Publication number	US-2018097056-A1
Application number	US-201615282504-A
Country	US
Kind code	A1
Filing date	Sep 30, 2016
Priority date	Sep 30, 2016
Publication date	Apr 5, 2018
Grant date	—

Abstract

A three capacitor stack and associated methods are shown. An exemplary capacitor device may include a first capacitor stack that includes a first plurality of layers of reference electrodes interleaved with first capacitor electrodes, a second capacitor stack on the first capacitor stack that includes a second plurality of layers of reference electrodes interleaved with second capacitor electrodes, and a third capacitor stack on the second capacitor stack that includes a reference electrode and a third capacitor electrode. A respective layer of dielectric material is formed between the reference electrodes and the first capacitor electrodes, the second capacitor electrodes, and the third capacitor electrode.

First claim

What is claimed is:

1 . An apparatus, comprising:
a capacitor device comprising: a first capacitor stack, the first capacitor stack including a first plurality of layers of reference electrodes interleaved with first capacitor electrodes, wherein, a respective layer of dielectric material is included in between each of the reference electrodes and the first capacitor electrodes; and a second capacitor stack, the second capacitor stack including a reference electrode layered over a second capacitor electrode, wherein, a respective layer of dielectric material is included in between the reference electrode and the second capacitor electrode.

2 . The apparatus of claim 1 , further comprising a third capacitor stack, the third capacitor stack including a third plurality of layers of reference electrodes interleaved with third capacitor electrodes, wherein, a respective dielectric layer is included in between each of the reference electrodes and the third capacitor electrodes.

3 . The apparatus of claim 2 , wherein a count of the first plurality of layers is different than a count of the third plurality of layers.

4 . The apparatus of claim 1 , further comprising:
a first contact connected to the first capacitor electrodes of the first capacitor stack; a second contact connected to the second capacitor electrode of the second capacitor stack; and a third contact connected to the reference electrodes of the first capacitor stack and the second capacitor stack.

5 . The apparatus of claim 4 , wherein a first capacitor electrode of the first capacitor electrodes of the first capacitor stack is offset from a first edge of a contacting layer of the dielectric material to provide a gap between the first capacitor electrode and the second contact, and wherein a particular reference electrode of the reference electrodes of the first capacitor is offset from a second edge of the contacting layer of the dielectric material to provide a gap between the particular reference electrode and the first contact.

6 . The apparatus of claim 1 , wherein the first capacitor electrodes of the first capacitor stack include a first material, wherein the second capacitor electrode of the second capacitor stack includes a second material; and wherein the reference electrodes of the first capacitor and the second capacitor include a third material.

7 . The apparatus of claim 6 , wherein the first material is different than the second material.

8 . The apparatus of claim 6 , wherein the first material, the second material, and the third material include a same material.

9 . The apparatus of claim 6 , wherein the first material and the third material each include one of a silver alloy, a palladium alloy, a nickel alloy or a copper

10 . The apparatus of claim 1 , wherein the dielectric material includes a ceramic material.

11 . The apparatus of claim 1 , wherein the device is a multi-layer ceramic chip capacitor.

12 . The apparatus of claim 1 , further comprising a chipset, wherein the chipset includes the capacitor device.

13 . A capacitor device, the capacitor device comprising:
a first capacitor stack that includes a first plurality of layers of reference electrodes interleaved with first capacitor electrodes; a second capacitor stack on the first capacitor stack that includes a second plurality of layers of reference electrodes interleaved with second capacitor electrodes; and a third capacitor stack on the second capacitor stack that includes a reference electrode and a third capacitor electrode, wherein a respective layer of dielectric material is formed between the reference electrodes and the first capacitor electrodes, the second capacitor electrodes, and the third capacitor electrode.

14 . The capacitor device of claim 13 , wherein a count of the first plurality of layers is different than a count of the second plurality of layers.

15 . The capacitor device of claim 13 , further comprising:
a first contact connected to the first capacitor electrodes of the first capacitor stack; a second contact connected to the second capacitor electrode of the second capacitor stack; a third contact connected to the third capacitor electrode; and a fourth contact connected to the reference electrodes of the first capacitor stack and the second capacitor stack.

16 . The capacitor device of claim 13 , wherein the dielectric material includes a ceramic material.

17 . The capacitor device of claim 13 , wherein the first capacitor stack has a capacitance value of 47 μF or 22 μF, wherein the second capacitor stack has a capacitance value of 4.7 μF or 2.2 μF, wherein the third capacitor stack has a capacitance value of 0.47 μF or 0.22 μF.

18 . The capacitor device of claim 13 , wherein a count of the first plurality of layers of the first capacitor electrode is an order of magnitude greater than a count of the second plurality of layers of the second capacitor.

19 . A method, comprising:
forming a first capacitor stack that includes a first plurality of layers of reference electrodes interleaved with first capacitor electrodes; forming a second capacitor stack on the first capacitor stack that includes a second plurality of layers of reference electrodes interleaved with second capacitor electrodes; and forming a third capacitor stack on the second capacitor stack that includes a reference electrode and a third capacitor electrode, wherein a respective layer of dielectric material is formed between the reference electrodes and the first capacitor electrodes, the second capacitor electrodes, and the third capacitor electrode.

20 . The method of claim 19 , further comprising, after forming the third capacitor stack, firing the first capacitor stack, the second capacitor stack, and the third capacitor stack in a kiln.

21 . The method of claim 19 , wherein a count of the first plurality of layers is different than a count of the second plurality of layers.

22 . The method of claim 19 , further comprising:
forming a first contact connected to the first capacitor electrodes of the first capacitor stack; forming a second contact connected to the second capacitor electrodes of the second capacitor stack; and forming a third contact connected to the third capacitor electrode of the third capacitor stack; and forming a fourth contact connected to the reference electrodes of the first capacitor stack, the second capacitor stack, and the third capacitor stack.

23 . The method of claim 22 , wherein forming the first capacitor stack includes:
forming a first stackable unit by: forming a layer of dielectric material; and forming a conductive material over the layer of dielectric material; forming a second stackable unit by: forming a layer of dielectric material; and forming a conductive material over the layer of dielectric material

24 . The method of claim 19 , further comprising:
forming the first capacitor electrodes of the first capacitor stack by printing a first material on a first layer of the dielectric material; forming the second capacitor electrodes of the second capacitor stack by printing a second material on a second layer of the dielectric material; forming the third capacitor electrode of the third capacitor stack by printing a third material on a third layer of the dielectric material; and forming the reference electrodes of the first capacitor stack, the second capacitor stack, and the third cap

Assignees

• Intel Corp

Inventors

• Goh Eng Huat
• Sir Jiun Hann
• Chua Han Kung
• Lim Min Suet
• Teoh Hoay Tien

Classifications

• H01L28/75 Primary

  Electricity · mapped topic

• H10D1/696 Primary

  comprising multiple layers, e.g. comprising a barrier layer and a metal layer (barrier layers to prevent diffusion of hydrogen or oxygen in perovskite based capacitors H10D1/688) · CPC title