Polysilicon residue removal in nanosheet mosfets

US2018090315A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2018090315-A1
Application numberUS-201715466420-A
CountryUS
Kind codeA1
Filing dateMar 22, 2017
Priority dateSep 28, 2016
Publication dateMar 29, 2018
Grant date

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  1. Title

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A method is presented for forming a semiconductor device. The method includes depositing a sacrificial layer on a fin structure formed on a substrate and then filled with polysilicon, etching a portion of the polysilicon material via a first etching process, and pre-cleaning the surface native oxide layer. The method further includes etching the remaining polysilicon material via a second etching process, and removing polysilicon etch residue formed adjacent the fin structure by a cleaning process. The pre-cleaning is performed by applying ammonia (NH 3 ) and nitrogen trifluoride (NF 3 ) or by applying buffered hydrofluoric acid (BHF). The first etching process is reactive ion etching (RIE) and the second etching process involves applying nitrogen trifluoride (NF 3 ) and hydrogen gas (H 2 ).

First claim

Opening claim text (preview).

1 . A method of forming a semiconductor device, the method comprising: etching a portion of a polysilicon material deposited over a dielectric layer of a fin via a first etching process such that remaining polysilicon material covers the fin; etching the remaining polysilicon material via a second etching process resulting in polysilicon etch residue formed on portions of the fin; and removing the polysilicon etch residue by a cleaning process. 2 . The method of claim 1 , wherein the fin is formed by alternating layers of silicon (Si) and silicon germanium (SiGe). 3 . The method of claim 1 , wherein the cleaning process exposes the dielectric layer. 4 . The method of claim 1 , wherein the cleaning process is a wet etch cleaning process. 5 . The method of claim 1 , further comprising pre-cleaning a surface of the remaining polysilicon material. 6 . The method of claim 5 , wherein the pre-cleaning is performed by applying ammonia (NH 3 ) and nitrogen trifluoride (NF 3 ). 7 . The method of claim 5 , wherein the pre-cleaning is performed by applying buffered hydrofluoric acid (BHF). 8 . The method of claim 1 , wherein the first etching process is reactive ion etching (RIE) and the second etching process involves applying nitrogen trifluoride (NF 3 ) and hydrogen gas (H 2 ). 9 . The method of claim 8 , wherein the nitrogen trifluoride (NF 3 ) flow is about 100 sccm-300 sccm and the H 2 flow is about 1000 sccm-5000 sccm. 10 . The method of claim 8 , wherein the second etching process has an etch rate of about 200 Å/minute and an anneal time of about 1 minutes to about 5 minutes. 11 . A method of forming nanosheet metal oxide semiconductor field effect transistors (MOSFETs), the method comprising: forming a plurality of fins each including a first material and a second material arranged in an alternating configuration; forming a polysilicon material over the plurality of fins; etching a portion of the polysilicon material deposited via a first etching process such that remaining polysilicon material covers the plurality of fins; etching the remaining polysilicon material via a second etching process resulting in polysilicon etch residue formed on the plurality of fins; removing the polysilicon etch residue by a cleaning process; and removing either the first material or the second material to form the nanosheet MOSFETs. 12 . The method of claim 11 , wherein the first material is silicon (Si) and the second material is silicon germanium (SiGe). 13 . The method of claim 11 , wherein the cleaning process is a wet etch cleaning process. 14 . The method of claim 11 , further comprising pre-cleaning a surface of the remaining polysilicon material. 15 . The method of claim 14 , wherein the pre-cleaning is performed by applying ammonia (NH 3 ) and nitrogen trifluoride (NF 3 ). 16 . The method of claim 14 , wherein the pre-cleaning is performed by applying buffered hydrofluoric acid (BHF). 17 . The method of claim 14 , wherein the pre-cleaning involves an isotropic process. 18 . The method of claim 11 , wherein the first etching process is reactive ion etching (RIE) and the second etching process involves applying nitrogen trifluoride (NF 3 ) and hydrogen gas (H 2 ). 19 . The method of claim 11 , wherein the plurality of fins include a dielectric liner formed before deposition of the polysilicon material. 20 . The method of claim 19 , wherein the cleaning process exposes the dielectric layer.

Assignees

Inventors

Classifications

  • H10P70/273Primary

    the processing being a delineation of conductive layers, e.g. by RIE · CPC title

  • during, before or after processing of insulating materials · CPC title

  • by chemical means · CPC title

  • containing silicon · CPC title

  • In-situ cleaning after layer formation, e.g. removing process residues · CPC title

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What does patent US2018090315A1 cover?
A method is presented for forming a semiconductor device. The method includes depositing a sacrificial layer on a fin structure formed on a substrate and then filled with polysilicon, etching a portion of the polysilicon material via a first etching process, and pre-cleaning the surface native oxide layer. The method further includes etching the remaining polysilicon material via a second etchi…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H10P70/273. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Mar 29 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).