Internal gamma correction for electronic displays

Patent metadata

Field	Value
Publication number	US-2018090084-A1
Application number	US-201715698343-A
Country	US
Kind code	A1
Filing date	Sep 7, 2017
Priority date	Sep 23, 2016
Publication date	Mar 29, 2018
Grant date	—

Abstract

Devices and methods for useful in providing localized synchronized and/or dynamic in-band internal gamma code adjustment per frame period are provided. By way of example, a display panel includes a data driver, which includes a first DAC configured to provide an internal gamma voltage signal to cause a first adjustment to an image data signal. The first adjustment is configured to selectively adjust the image data signal based at least in part on a refresh rate or a frame rate of the display panel. The data driver includes a second DAC coupled to the first DAC and configured to provide an external gamma voltage signal configured to provide a second adjustment to the image data signal, and an output buffer configured to supply the image data signal to pixels of the display panel, wherein the image data signal comprises the first adjustment and the second adjustment.

First claim

What is claimed is:

1 . A display panel, comprising:
a data driver, comprising:
a first digital to analog converter (DAC) configured to provide an internal gamma voltage signal configured to cause a first adjustment to an image data signal to be supplied to pixels of the display panel, wherein the first adjustment is configured to selectively adjust the image data signal based at least in part on a refresh rate or a frame rate of the display panel;
a second DAC coupled to the first DAC and configured to provide an external gamma voltage signal configured to provide a second adjustment to the image data signal; and
an output buffer configured to supply the image data signal to pixels of the display panel, wherein the image data signal comprises the first adjustment and the second adjustment.

2 . The display panel of claim 1 , wherein the first DAC is configured to provide a first gamma voltage correction value as the internal gamma voltage signal.

3 . The display panel of claim 2 , wherein the second DAC is configured to provide a second gamma voltage correction value as the external gamma voltage signal.

4 . The display panel of claim 1 , wherein the first DAC is configured to provide a first gamma correction value corresponding to a positive image data signal and a second gamma correction value corresponding to a negative image data signal.

5 . The display panel of claim 1 , wherein the first DAC is configured to provide the internal gamma voltage signal to selectively adjust the image data signal by providing the internal gamma voltage signal to the second DAC when the refresh rate or the frame rate of the display panel changes.

6 . The display panel of claim 1 , wherein the first DAC is configured to provide a plurality of sets of internal gamma voltage correction values, and wherein each of the plurality of sets of internal gamma voltage correction values corresponds to a different refresh rate or a different frame rate of the display panel.

7 . The display panel of claim 6 , wherein each of the plurality of sets of internal gamma voltage correction values comprises approximately 5 positive internal gamma voltage correction values and approximately 5 negative internal gamma voltage correction values.

8 . The display panel of claim 1 , wherein the display panel comprises a variable refresh rate electronic display.

9 . The display panel of claim 1 , comprising a timing controller (TCON) configured to generate the internal gamma voltage signal and to provide the internal gamma voltage signal to the data driver via a column driver interface (CDI) protocol.

10 . The display panel of claim 1 , wherein the first DAC is configured to provide the internal gamma voltage signal to reduce or substantially eliminate a possible occurrence of artifacts on the display panel.

11 . A method of operating an electronic display, comprising:
generating one or more internal gamma correction voltages per frame to be selectively supplied to localized pixels of the electronic display, wherein the electronic display is configured to operate at variable refresh rates; generating an image data output signal per frame based at least in part on the one or more internal gamma correction voltages; and supplying the image data output signal to the localized pixels of the electronic display on a frame by frame basis.

12 . The method of operating the electronic display of claim 11 , wherein generating the one or more internal gamma correction voltages comprises generating positive polarity gamma correction voltages and negative polarity gamma correction voltages.

13 . The method of operating the electronic display of claim 11 , wherein generating the one or more internal gamma correction voltage values per frame comprises generating the one or more internal gamma correction voltages according to the variable refresh rates.

14 . An electronic device, comprising:
a timing controller (TCON) comprising internal gamma code generation circuitry configured to generate a first set of internal gamma code voltages; and a column driver coupled to the TCON and configured to transmit image data to one or more pixels of a liquid crystal display (LCD), comprising:
a first resistor string configured to receive the first set of internal gamma code voltages and to provide a second set of internal gamma code voltages based thereon;
a multiplexer (MUX) coupled to the first resistor string and configured to select one or more of the second set of internal gamma code voltages based at least in part on a refresh rate or a frame rate of the LCD;
a second resistor string coupled to the MUX and configured to receive the selected one or more of the second set of internal gamma code voltages to adjust a characteristic of the image data; and
an output buffer configured to supply the adjusted image data to pixels of the LCD.

15 . The electronic device of claim 14 , wherein the MUX is configured to selectively provide the one or more of the second set of internal gamma code voltages to the second resistor string when the refresh rate or the frame rate changes.

16 . The electronic device of claim 14 , wherein the first resistor string and the second resistor string each comprises a plurality of resistors coupled one to another in series.

17 . The electronic device of claim 16 , wherein the plurality of resistors comprises 2 N resistors, and wherein N comprises a resolution in bits.

18 . The electronic device of claim 14 , wherein first resistor string comprises less resistors than the second resistor string.

19 . The electronic device of claim 14 , comprising a buffer coupled to the MUX and to the second resistor string, wherein the buffer is configured to receive an indication of when to switch between allowing the one or more of the second set of internal gamma code voltages to pass to the second resistor string and disallowing the one or more of the second set of internal gamma code voltages to pass to the second resistor string.

20 . The electronic device of claim 14 , wherein the output buffer is configured to supply the adjusted image data to localized pixels of the LCD.

Assignees

• Apple Inc

Inventors

• Zheng Fenghua
• Tann Christopher P
• Pintz Sandro H
• Zalatimo David S
• Qi Jun
• Ge Zhibing

Classifications

• G09G2360/02

  Graphics controller able to handle multiple formats, e.g. input or output formats · CPC title

• G09G3/3611 Primary

  Control of matrices with row and column drivers · CPC title

• G09G2360/16

  Calculation or use of calculated indices related to luminance levels in display data · CPC title

• G09G2320/0673

  for control of gamma adjustment, e.g. selecting another gamma curve · CPC title

• G09G2320/0276

  for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction · CPC title