Semiconductor device and method of fabricating the semiconductor device

Patent metadata

Field	Value
Publication number	US-2018068923-A1
Application number	US-201715680802-A
Country	US
Kind code	A1
Filing date	Aug 18, 2017
Priority date	Sep 6, 2016
Publication date	Mar 8, 2018
Grant date	—

Abstract

A disclosed semiconductor device includes a buffer layer formed of a compound semiconductor on a substrate, a first semiconductor layer formed of a compound semiconductor on the buffer layer, a second semiconductor layer formed of a compound semiconductor on the first semiconductor layer, a gate electrode, a source electrode, and a drain electrode formed on the second semiconductor layer, and a heat dissipation part formed below the gate electrode. In the semiconductor device, all or part of the second semiconductor layer and the first semiconductor layer is present between the gate electrode and the heat dissipation part, the heat dissipation part includes a heat dissipation layer and a first intermediate layer formed between the heat dissipation layer and both of the buffer layer and first semiconductor layer, and the heat dissipation layer is formed of a material containing carbon.

First claim

What is claimed is:

1 . A semiconductor device comprising:
a buffer layer formed of a compound semiconductor on a substrate; a first semiconductor layer formed of a compound semiconductor on the buffer layer; a second semiconductor layer formed of a compound semiconductor on the first semiconductor layer; a gate electrode, a source electrode, and a drain electrode formed on the second semiconductor layer; and a heat dissipation part formed below the gate electrode, wherein all or part of the second semiconductor layer and the first semiconductor layer is present between the gate electrode and the heat dissipation part, the heat dissipation part includes a heat dissipation layer and a first intermediate layer formed between the heat dissipation layer and both of the buffer layer and first semiconductor layer, and the heat dissipation layer is formed of a material containing carbon.

2 . The semiconductor device as claimed in claim 1 , wherein
the heat dissipation part includes a second intermediate layer formed between the first intermediate layer and the heat dissipation layer, and the second intermediate layer is formed of a material including both an element contained in the first intermediate layer and carbon.

3 . The semiconductor device as claimed in claim 2 , wherein
the second intermediate layer is formed of a material containing any of SiC, AlC, SiCN, and carbon nitride.

4 . The semiconductor device as claimed in claim 1 , wherein
the first intermediate layer is formed of a material containing SiN or AlN.

5 . The semiconductor device as claimed in claim 1 , wherein
the first intermediate layer is formed of a material containing any of SiC, AlC, SiCN, and carbon nitride.

6 . The semiconductor device as claimed in claim 1 , wherein
the thickness of the second intermediate layer is 10 nm or less.

7 . The semiconductor device as claimed in claim 1 , wherein
the thickness of the first intermediate layer is 10 nm or less.

8 . The semiconductor device as claimed in claim 1 , wherein
each of the compound semiconductors is a nitride semiconductor.

9 . The semiconductor device as claimed in claim 1 , wherein
the thickness between the gate electrode and the heat dissipation part is 50 nm or more and 500 nm or less.

10 . The semiconductor device as claimed in claim 1 , wherein
the heat dissipation layer is formed of a material containing any of diamond, carbon nanotube, graphene, and nanodiamond.

11 . The semiconductor device as claimed in claim 1 , wherein
the heat dissipation part is further formed below a region between the gate electrode and the drain electrode.

12 . The semiconductor device as claimed in claim 11 , wherein
the depth from a top surface of the second semiconductor layer to the heat dissipation part increases as a distance from the gate electrode increases.

13 . The semiconductor device as claimed in claim 1 , wherein
the heat dissipation part is further formed below a region between the gate electrode and the drain electrode.

14 . The semiconductor device as claimed in claim 1 , wherein
the heat dissipation part is further formed on a back surface of the substrate.

15 . The semiconductor device as claimed in claim 1 , wherein
the first semiconductor layer is formed of a material containing GaN, and the second semiconductor layer is formed of a material containing AlGaN or InAlN.

16 . A method for fabricating a semiconductor device, the method comprising:
sequentially forming on a substrate, with one or more compound semiconductors, a buffer layer, a first semiconductor layer, and a second semiconductor layer; forming a groove in a back surface of the substrate; forming a first intermediate layer in the groove and on the back surface of the substrate; forming a heat dissipation layer on the first intermediate layer to fill the groove so as to form a heat dissipation part including the first intermediate layer and the heat dissipation layer; and forming a gate electrode, a source electrode, and a drain electrode on the second semiconductor layer, wherein the heat dissipation part is formed below the gate electrode, and the heat dissipation layer is formed of a material containing carbon.

17 . The method as claimed in claim 16 , further comprising:
forming a second intermediate layer on the first intermediate layer after the forming of the first intermediate layer, wherein the heat dissipation layer is formed on the second intermediate layer, and the second intermediate layer is formed of a material including both an element contained in the first intermediate layer and carbon.

18 . The method as claimed in claim 16 , further comprising:
removing, after forming the heat dissipation part, part of the heat dissipation part formed on the back surface (bottom surface in the figure) of the substrate.

19 . A power supply device comprising:
the semiconductor device as claimed in claim 1 .

20 . An amplifier comprising:
the semiconductor device as claimed in claim 1 .

Assignees

• Fujitsu Ltd

Inventors

• Kotani Junji
• Nakamura Norikazu

Classifications

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W72/07552

  changes in structures or sizes · CPC title

• H10W72/926

  Multiple bond pads having different sizes · CPC title

• H10W72/527

  Multiple bond wires having different sizes · CPC title