Circuit and method for protecting a voltage regulating circuit against electrostatic discharges

Patent metadata

Field	Value
Publication number	US-2018041024-A1
Application number	US-201715436186-A
Country	US
Kind code	A1
Filing date	Feb 17, 2017
Priority date	Aug 4, 2016
Publication date	Feb 8, 2018
Grant date	—

Abstract

An integrated circuit includes a voltage regulating circuit in the form of only one transistor, or a group of several transistors in parallel, that are connected between first and second terminals configured to be coupled to an antenna. A control circuit operates to make the voltage regulating circuit inactive when a pulse generated by an electrostatic discharge event appears at one of the first and second terminals, regardless of the direction of flow of the pulse between the first and second terminals. An electrostatic discharge circuit is further provided to address the electrostatic discharge event.

First claim

1 . An integrated circuit, comprising:
a first terminal and a second terminal configured to be coupled to an antenna, a processing circuit coupled between the first and second terminals, a voltage regulating circuit configured to regulate a voltage between the first and second terminals, wherein the voltage regulating circuit includes only one transistor, or a group of several transistors in parallel, connected between the first and second terminals, a protection circuit configured to protect the processing circuit in the event of an electrostatic discharge while the integrated circuit is not powered, and a control circuit configured to make the voltage regulating circuit inactive during the event of the electrostatic discharge while the integrated circuit is not powered regardless of a direction of flow of a pulse between the first and second terminals resulting from said event of the electrostatic discharge.

2 . The circuit according to claim 1 , wherein the control circuit is connected to a gate of the only one transistor, or group of several transistors in parallel, of the voltage regulating circuit and is configured to:
connect said gate to the second terminal when the flow of the pulse from said event of the electrostatic discharge is from the first terminal towards the second terminal, and connect said gate to the first terminal when the flow of the pulse from said event of the electrostatic discharge is from the second terminal towards the first terminal.

3 . The circuit according to claim 1 ,
wherein the protection circuit includes a protection device and a triggering circuit configured to trigger the device circuit in the event of the electrostatic discharge, and wherein the control circuit includes a first transistor, a second transistor, a third transistor, and a fourth transistor, wherein the first through fourth transistors are connected in series between the first and the second terminals, the first transistor having a gate connected to the second terminal and an electrode connected to the first terminal, the second transistor and the third transistor having respective gates connected to the triggering circuit and a common electrode connected to the gate of the only one transistor, or group of several transistors in parallel, of the voltage regulating circuit, and the fourth transistor having a gate connected to the first terminal and an electrode connected to the second terminal.

4 . The circuit according to claim 1 , further comprising:
a comparison circuit configured to activate the voltage regulating circuit in response to a voltage surge at the first and second terminals, and a resistance connected in series between an output of the comparison circuit and the gate of the only one transistor, or group of several transistors in parallel, of the voltage regulating circuit.

5 . A device, comprising:
an integrated circuit, comprising:
a first terminal and a second terminal,
a processing circuit coupled between the first and second terminals,
a voltage regulating circuit configured to regulate a voltage between the first and second terminals, wherein the voltage regulating circuit includes only one transistor, or a group of several transistors in parallel, connected between the first and second terminals,
a protection circuit configured to protect the processing circuit in the event of an electrostatic discharge while the integrated circuit is not powered, and
a control circuit configured to make the voltage regulating circuit inactive during the event of the electrostatic discharge while the integrated circuit is not powered regardless of a direction of flow of a pulse between the first and second terminals resulting from said event of the electrostatic discharge; and
an antenna connected to the first terminal and to the second terminal.

6 . The device according to claim 5 , wherein the device is one of a chip card, a radio-frequency identification badge or a wireless communication device.

7 . An integrated circuit, comprising:
a first terminal and a second terminal configured to be coupled to an antenna, a voltage regulating circuit coupled between the first and second terminals and having a control terminal, said voltage regulating circuit activated in responsive to a first control signal received at the control terminal to increase an impedance at the first and second terminals; a sensing circuit configured to detect a surge due to an electromagnetic field at said antenna and assert said first control signal; and a control circuit configured to deactivate the voltage regulating circuit during an event of an electrostatic discharge at one of the first and second terminals while the integrated circuit is not powered.

8 . The integrated circuit of claim 7 , wherein said voltage regulating circuit comprises only one transistor connected between the first and second terminals.

9 . The integrated circuit of claim 8 , wherein said control circuit connects a gate terminal of said one transistor to the second terminal when a flow of a pulse from said event of the electrostatic discharge is from the first terminal towards the second terminal.

10 . The integrated circuit of claim 8 , wherein said control circuit connects a gate terminal of said one transistor to the first terminal when a flow of a pulse from said event of the electrostatic discharge is from the second terminal towards the first terminal.

11 . The integrated circuit of claim 7 , wherein said voltage regulating circuit comprises only a group of several transistors connected in parallel with each other between the first and second terminals.

12 . The integrated circuit of claim 11 , wherein said control circuit connects gate terminals of said group of several transistors to the second terminal when a flow of a pulse from said event of the electrostatic discharge is from the first terminal towards the second terminal.

13 . The integrated circuit of claim 11 , wherein said control circuit connects gate terminals of said group of several transistors to the first terminal when a flow of a pulse from said event of the electrostatic discharge is from the second terminal towards the first terminal.

14 . The integrated circuit of claim 7 , wherein the control circuit comprises an electrostatic discharge detection circuit coupled to said first and second terminals, said electrostatic discharge detection circuit generating a second control signal that deactivates the voltage regulating circuit.

15 . The integrated circuit of claim 14 , further comprising an electrostatic discharge circuit activated in response to said second control signal.

Assignees

• St Microelectronics Rousset

Inventors

• Demange Nicolas

Classifications

• G06K19/0701

  at least one of the integrated circuit chips comprising an arrangement for power management · CPC title

• G06K19/07735

  the record carrier comprising means for protecting against electrostatic discharge · CPC title

• H02H9/046

  responsive to excess voltage appearing at terminals of integrated circuits · CPC title

• H02H9/041

  using a short-circuiting device · CPC title

• H02H7/1252 Primary

  responsive to overvoltage in input or output, e.g. by load dump · CPC title