Control circuit board, micro-server, control system and control method thereof

Patent metadata

Field	Value
Publication number	US-2018032461-A1
Application number	US-201615260174-A
Country	US
Kind code	A1
Filing date	Sep 8, 2016
Priority date	Jul 26, 2016
Publication date	Feb 1, 2018
Grant date	—

Abstract

A control system includes a host device, a plurality of computing nodes of micro-servers, a first switch and a first processor. The first switch is electrically connected to the plurality of computing nodes of micro-servers and the host device. The first processor is electrically connected to the plurality of computing nodes of micro-servers, the host device and the first switch. The first processor is configured to process a first GPIO signal provided by the host device and generate a first control command according to the result of processing the first GPIO signal. The first processor selectively turns on the data path from the first switch to one of the plurality of computing nodes of micro-servers and sends a second GPIO signal to one of the plurality of computing nodes of micro-servers.

First claim

What is claimed is:

1 . A control circuit board, comprising:
a host device providing a first general purpose input/output (GPIO) signal; a first switch electrically connected to the host device; and a first processor electrically connected to the first switch and the host device, processing the first GPIO signal, generating a first control command according to a result of processing the first GPIO signal, and selectively conduct a data path from the first switch to one of a plurality of computing nodes of a micro-server according to the first control command.

2 . The control circuit board according to claim 1 , wherein the result of processing the first GPIO signal includes a code, the first processor distinguishes one of the plurality of computing nodes and generates the first control command according to the code.

3 . A micro-server, comprising:
a plurality of computing nodes of the micro-server, wherein each of the plurality of computing nodes comprises:
a plurality of baseboard management controllers;
a second switch electrically connected to the plurality of baseboard management controllers; and
a second processor electrically connected to the second switch, processing a second GPIO signal, generating a second control command according to a result of processing the second GPIO signal, and selectively conducting a data path from the second switch to one of the plurality of baseboard management controllers.

4 . The micro-server according to claim 3 , wherein the result of processing the second GPIO signal includes a code, the second processor distinguishes one of the plurality of baseboard management controllers and generates the second control command according to the code.

5 . A control system, comprising:
a host device providing a first GPIO signal; a micro-server with a plurality of computing nodes; a first switch electrically connected to the plurality of computing nodes of the micro-server and the host device; and a first processor electrically connected to the plurality of computing nodes of micro-servers, the host device and the first switch, processing the first GPIO signal, generating a first control command according to a result of processing the first GPIO signal, selectively conducting a data path from the first switch to one of the plurality of computing nodes of micro-servers according to the first command, and sending a second GPIO signal to one of the plurality of computing nodes, wherein each of the plurality of computing nodes comprises:
a plurality of baseboard management controllers;
a second switch electrically connected to the plurality of baseboard management controllers and the first switch; and
a second processor electrically connected to the first processor and the second switch, processing a second GPIO signal, generating a second control command according to a result of processing the second GPIO signal, and selectively conducting a data path from the second switch to one of the plurality of baseboard management controllers.

6 . The control system according to claim 5 , wherein the result of processing the first GPIO signal includes a code, the first processor distinguishes one of the plurality of computing nodes of micro-servers and generates the first control command according to the code.

7 . The control system according to claim 6 , wherein the result of processing the second GPIO signal includes the code, the second processor distinguishes one of the plurality of baseboard management controllers and generates the second control command according to the code.

8 . A control method applied to a plurality of computing nodes of a micro-server, wherein each the computing node comprises a plurality of baseboard management controllers, and the control method comprises:
selecting one of the plurality of computing nodes; providing a first GPIO signal according to the selected computing node; processing the first GPIO signal and generating a first command according a result of processing the first GPIO signal; and conducting a data path from a first switch to the selected computing node and delivering a second GPIO signal to the selected computing node by a electrical path.

9 . The control method according to claim 8 , further comprising:
processing the second GPIO signal and generating a second command according a result of processing the first GPIO signal; and selectively conducting a data path from a second switch to one of the plurality of baseboard management controllers.

10 . The control method according to claim 9 , wherein the result of processing the first GPIO signal includes a code, a first processor distinguishes the selected computing node and generates a first control command according to the code, the result of processing the second GPIO signal includes the code, a second processor distinguishes one of the plurality of baseboard management controllers and generates the second command according the code.

Assignees

• Inventec (Pudong) Tech Corporation
• Inventec Corp

Inventors

• Zhang Song

Classifications

• G06F13/4022 Primary

  using switching circuits, e.g. switching matrix, connection or expansion network (G06F13/4009 takes precedence) · CPC title

• G06F13/4221

  being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus · CPC title