Storage device and storage control method

Patent metadata

Field	Value
Publication number	US-2018024779-A1
Application number	US-201715658316-A
Country	US
Kind code	A1
Filing date	Jul 24, 2017
Priority date	Jul 25, 2016
Publication date	Jan 25, 2018
Grant date	—

Abstract

A storage device includes a nonvolatile semiconductor memory and a controller. The nonvolatile semiconductor memory includes a first region and a second region. The controller classifies a plurality of read requests for reading data from the nonvolatile semiconductor memory into first read requests for reading data from the first region and second read requests for reading data from the second region, pairs one of the first read requests with one of the second read requests to generate a third read request, and outputs the third read request to the nonvolatile semiconductor memory.

First claim

What is claimed is:

1 . A storage device, comprising:
a nonvolatile semiconductor memory having a first region and a second region; and a controller configured to classify a plurality of read requests for reading data from the nonvolatile semiconductor memory into first read requests for reading data from the first region and second read requests for reading data from the second region, wherein the controller is configured to pair one of the first read requests with one of the second read requests to generate a third read request, and output the third read request to the nonvolatile semiconductor memory.

2 . The storage device according to claim 1 , wherein the nonvolatile semiconductor memory performs a read operation in the first region in parallel with a read operation in the second region in response to the third read request.

3 . The storage device according to claim 2 , wherein the first region includes a first plane of memory cells and the second region includes a second plane of memory cells, and the third read request is a multi-plane read request.

4 . The storage device according to claim 1 , further comprising:
an interface through which a plurality of commands for accessing the nonvolatile semiconductor memory is received from a host device, wherein the controller is configured to generate the first read requests and the second read requests based on the plurality of commands received through the interface, and to store first read requests in a first queue and to store the second read requests in a second queue.

5 . The storage device according to claim 1 , wherein the controller is configured to:
determine a read time for each of the plurality of read requests and further classify the plurality of read requests based on the determined read times, and to pair one of the first read requests and one of the second read requests based on the determined read times.

6 . The storage device according to claim 5 , wherein
the controller is configured to store the first read requests in first and second queues according to the determined read times for the first read requests and to store the second read requests in third and fourth queues according to the determined read times for the second read requests, wherein: the first read requests for which the determined read time is less than a first time are stored in the first queue; the first read requests for which the determined read time is equal to or more than the first time are stored in the second queue; the second read requests for which the determined read time is less than the first time are stored in the third queue; and the second read requests for which the determined read time is equal to or more than the first time are stored in the fourth queue.

7 . The storage device according to claim 6 , wherein the third request includes either one of the first read requests in the first queue and one of the second read requests in the third queue, or one of the first read requests in the second queue and one of the second read requests in the fourth queue.

8 . The storage device according to claim 5 , wherein
the controller is configured to determine the read time based on a recording scheme for memory cells of the nonvolatile semiconductor memory from which data are read based on the first read requests or the second read requests.

9 . The storage device according to claim 8 , wherein the recording scheme for memory cells includes a single-level cell recording scheme and a multi-level cell recording scheme.

10 . The storage device according to claim 8 , wherein the recording scheme for memory cells includes a multi-level cell recording scheme that employs a first coding and a multi-level cell recording scheme that employs a second coding.

11 . The storage device according to claim 5 ,
wherein the controller is configured to determine the read time based on a page address of data that is read based on the first read requests or the second read requests.

12 . The storage device according to claim 1 , wherein
the nonvolatile semiconductor memory stores an address conversion table that is used to convert a logical address into a physical address of the nonvolatile semiconductor memory, and the controller is configured to generate a table read request for reading a portion of the address conversion table from the nonvolatile semiconductor memory, and the table read request is one of the read requests that are classified as one of the first and second read requests.

13 . The storage device according to claim 12 , wherein
the controller is configured to generate the table read request based on a read command received from a host device, and a user data read request for reading user data from the nonvolatile semiconductor memory based on the read command, and the third read request includes the table read request and the user data read request.

14 . The storage device according to claim 1 , wherein
the nonvolatile semiconductor memory stores an address conversion table that is used to convert a logical address into a physical address of the nonvolatile semiconductor memory, and the controller is configured to generate table read requests for reading portions of the address conversion table from the nonvolatile semiconductor memory, and each of the table read requests is one of the read requests that are classified as one of the first and second read requests, generate a first user data read request for reading user data from the nonvolatile semiconductor memory and a second user data read request, which is different from the first user data read request, for reading user data from the nonvolatile semiconductor memory, based on one or more read commands received from a host device, and to pair the table read requests to generate the third read request in preference to pairing the first and second user data read requests to generate the third read request.

15 . The storage device according to claim 1 , wherein
the controller is further configured to generate an address resolution request for converting a logical address of data stored in the nonvolatile semiconductor memory into a first physical address, and determine whether or not the data stored in the nonvolatile semiconductor memory is valid based on the first physical address and a second physical address read from a log that describes a correspondence between logical addresses and physical addresses of data stored in the nonvolatile semiconductor memory.

16 . A storage device, comprising:
a nonvolatile semiconductor memory having a first region and a second region, and storing an address conversion table that is used to convert logical addresses into physical addresses of the nonvolatile semiconductor memory; and a controller configured to store user data in a buffer memory in response to a write command associated with a logical address and user data, received from a host, and notify the host of completion of the write command, wherein subsequent to notifying the host of completion of the write command, the controller writes the user data stored in the buffer memory into the nonvolatile semiconductor memory at a physical address, and generates an address update request for updating a correspondence relationship between the logical address and the physical address for the user data, and the controller generates table read requests for reading portions of the address conversion table from the nonvolatile semiconductor memory in response to one or more address update requests, classifies the table read requests as first requests for reading

Assignees

• Toshiba Memory Corp

Inventors

• Kojima Yoshihisa

Classifications

• G06F12/109

  for multiple virtual address spaces, e.g. segmentation (G06F12/1036 takes precedence) · CPC title

• G06F2212/7208

  Multiple device management, e.g. distributing data over multiple flash devices · CPC title

• G06F2212/657

  Virtual address space management · CPC title

• G06F2212/7201

  Logical to physical mapping or translation of blocks or pages · CPC title

• G06F2212/1041

  Resource optimization · CPC title