Low dropout regulator circuit and method for controlling a voltage of a low dropout regulator circuit

Patent metadata

Field	Value
Publication number	US-2018017984-A1
Application number	US-201615546656-A
Country	US
Kind code	A1
Filing date	Jan 21, 2016
Priority date	Jan 28, 2015
Publication date	Jan 18, 2018
Grant date	—

Abstract

An LDO circuit comprises a pass element, and input stage, a current sink, a comparator and a control circuit. The pass element is configured to generate an output voltage depending on a gate signal and on an input voltage. The input stage is configured to generate a steering signal based on a deviation between a first reference signal and a feedback signal, the feedback signal being based on the output voltage. The current sink is controlled by a steering signal and connected between the gate control terminal and a reference terminal. The comparator is configured to compare the steering signal to a second reference signal and to generate a switch signal based on the comparison. The control circuit comprises a first current path and is configured to suspend, in particular temporarily suspend, the first current path depending on the switch signal.

First claim

1 . A low dropout regulator, LDO, circuit comprising
a pass element configured to generate at an output terminal an output voltage depending on a gate signal received at a gate control terminal and on an input voltage received at an input terminal; an input stage configured to generate a steering signal based on a deviation between a first reference signal and a feedback signal, the feedback signal being based on the output voltage; a current sink controlled by the steering signal and connected between the gate control terminal and a reference terminal; a comparator configured to compare the steering signal to a second reference signal and to generate a switch signal based on the comparison; and a control circuit comprising a first current path, the first current path coupled between the input terminal and the gate control terminal, the control circuit being configured to temporarily suspend the first current path depending on the switch signal.

2 . The LDO circuit according to claim 1 , further configured to operate in a dropout mode of operation and wherein the control circuit is configured to suspend the first current path when the LDO circuit is operating in the dropout mode.

3 . The LDO circuit according to claim 1 , further configured to operate in a regulation mode of operation and wherein the control circuit is configured to activate the first current path when the LDO circuit is operating in the regulation mode.

4 . The LDO circuit according to claim 1 , further configured to operate in a dropout mode of operation and in a regulation mode of operation depending on a relation between the steering signal and the second reference signal, wherein the control circuit is configured
to suspend the first current path when the LDO circuit is operating in the dropout mode; and to activate the first current path when the LDO circuit is operating in the regulation mode.

5 . The LDO circuit according to claim 2 , wherein the LDO circuit is operating in the dropout mode if the input voltage is smaller than a threshold input voltage.

6 . The LDO circuit according to claim 3 , wherein the LDO circuit is operating in the regulation mode if the input voltage is larger than a threshold input voltage.

7 . The LDO circuit according to claim 5 , wherein the threshold input voltage corresponds to a sum of a target output voltage and a dropout voltage.

8 . The LDO circuit according to claim 7 , wherein the dropout voltage is given by a minimum voltage drop between the input terminal and the output terminal via the pass element.

9 . The LDO circuit according to claim 1 , wherein one of the following applies:
the LDO circuit operates in the dropout mode if a value of the steering signal is larger than a value of the second reference signal; or the LDO circuit operates in the dropout mode if the value of the steering signal is smaller than the value of the second reference signal.

10 . The LDO circuit according to claim 1 , wherein the control circuit comprises a second current path coupled in parallel to the first current path.

11 . The LDO circuit according to claim 10 , wherein the control circuit is configured to suspend the second current path when the LDO circuit is operating in the dropout mode.

12 . The LDO circuit according to claim 10 , wherein the second current path is not suspended when the LDO circuit is operating in the dropout mode.

13 . The LDO circuit according to claim 1 , wherein the input stage comprises an operational amplifier with a first amplifier input for receiving the first reference signal, with a second amplifier input coupled to the output terminal for receiving the feedback signal and with an amplifier output for supplying the steering signal.

14 . The LDO circuit according to claim 13 , wherein the operational amplifier is implemented as an operational transconductance amplifier.

15 . The LDO circuit according to claim 13 , further comprising a voltage divider coupled between the second amplifier input and the output terminal.

16 . The LDO circuit according to claim 1 , wherein the current sink is in a conducting state if a value of the steering signal is equal to a value of the second reference signal.

17 . The LDO circuit according to claim 1 , wherein a value of the second reference signal depends on a characteristic value of the current sink.

18 . The LDO circuit according to claim 1 , wherein
the current sink is implemented as a field effect transistor; and the value of the second reference signal corresponds to a voltage being larger than a threshold voltage of the current sink.

19 . The LDO circuit according to claim 1 , wherein the pass element is implemented as a field effect transistor.

20 . The LDO according to claim 1 , further comprising a mirror device arranged and configured to adjust a current through the first current path depending on the output voltage.

21 . A method for controlling an output voltage of a low dropout regulator, LDO, circuit, wherein the method comprises
applying an input voltage to an input terminal of a pass element of the LDO circuit and a gate signal to a gate control terminal; generating the output voltage depending on the gate signal and on the input voltage; generating a steering signal based on a deviation between a first reference signal and a feedback signal, the feedback signal being based on the output voltage; comparing the steering signal to a second reference signal; generating a switch signal based on the comparison; and temporarily suspending a first current path of the LDO circuit depending on the switch signal.

22 . The method according to claim 21 , wherein first current path is suspended when the LDO circuit is operating in a dropout mode of operation.

23 . The method according to claim 21 , wherein the first current path is activated when the LDO circuit is operating in a regulation mode of operation.

24 . The method according to claim 21 , wherein the method further comprises
operating the LDO circuit in a dropout mode of operation or in a regulation mode of operation depending on a relation between the steering signal and the second reference signal; suspending the first current path when the LDO circuit is operating in the dropout mode; and activating the first current path when the LDO circuit is operating in the regulation mode.

25 . The method according to claim 21 , wherein the LDO circuit is operating in the dropout mode if the input voltage is smaller than a threshold input voltage.

26 . The method according to claim 23 , wherein the LDO circuit is operating in the regulation mode if the input voltage is larger than a threshold input voltage.

27 . The method according to claim 25 , wherein the threshold input voltage corresponds to a sum of a target output voltage and a dropout voltage.

28 . The method according to claim 27 , wherein the dropout voltage is given by a minimum voltage drop via the pass element.

Assignees

• Ams Ag

Inventors

• Mayer Martin
• Jessenig Thomas

Classifications

• G05F1/575 Primary

  characterised by the feedback circuit · CPC title