Epitaxial wafer manufacturing method, epitaxial wafer, semiconductor device manufacturing method, and semiconductor device

Patent metadata

Field	Value
Publication number	US-2018012758-A1
Application number	US-201715712644-A
Country	US
Kind code	A1
Filing date	Sep 22, 2017
Priority date	Oct 30, 2015
Publication date	Jan 11, 2018
Grant date	—

Abstract

A method for manufacturing an epitaxial wafer comprising a silicon carbide substrate and a silicon carbide voltage-blocking-layer, the method includes: epitaxially growing a buffer layer on the substrate, doping a main dopant for determining a conductivity type of the buffer layer and doping an auxiliary dopant for capturing minority carriers in the buffer layer at a doping concentration less than the doping concentration of the main dopant, so that the buffer layer enhances capturing and extinction of the minority carriers, the minority carriers flowing in a direction from the voltage-blocking-layer to the substrate, so that the buffer layer has a lower resistivity than the voltage-blocking-layer, and so that the buffer layer includes silicon carbide as a main component; and epitaxially growing the voltage-blocking-layer on the buffer layer.

First claim

What is claimed is:

1 . A method for manufacturing an epitaxial wafer comprising a silicon carbide substrate and a silicon carbide voltage-blocking-layer, the method including:
epitaxially growing a buffer layer on the substrate, doping a main dopant for determining a conductivity type of the buffer layer and doping an auxiliary dopant for capturing minority carriers in the buffer layer at a doping concentration less than the doping concentration of the main dopant, so that the buffer layer enhances capturing and extinction of the minority carriers, the minority carriers flowing in a direction from the voltage-blocking-layer to the substrate, so that the buffer layer has a lower resistivity than the voltage-blocking-layer, and so that the buffer layer includes silicon carbide as a main component; and epitaxially growing the voltage-blocking-layer on the buffer layer.

2 . The method according to claim 1 , wherein the main dopant is doped at a doping concentration equal to or greater than 1.0×10 18 cm −3 and less than 1.0×10 19 cm −3 .

3 . The method according to claim 2 , wherein the buffer layer is implemented with a thickness equal to or greater than 0.1 micrometer and equal to or less than five micrometers.

4 . The method according to claim 3 , wherein the auxiliary dopant is doped at a doping concentration less than the doping concentration of the main dopant and the doping concentration of the auxiliary dopant is equal to or greater than 1.0×10 14 cm −3 and less than 5.0×10 18 cm −3 .

5 . The method according to claim 4 , wherein the main dopant and the auxiliary dopant are doped at the same time.

6 . The method according to claim 4 , wherein, after the main dopant is doped, the auxiliary dopant is doped.

7 . The method according to claim 1 , wherein the main dopant is nitrogen, and
the auxiliary dopant includes at least one of aluminum, boron, vanadium, titanium, iron, and chromium.

8 . The method according to claim 1 , wherein the main dopant is aluminum, and
the auxiliary dopant includes at least one of nitrogen, boron, vanadium, titanium, iron, and chromium.

9 . A method for manufacturing an epitaxial wafer comprising a silicon carbide substrate and a silicon carbide voltage-blocking-layer, the method including:
epitaxially growing a single-crystalline layer including silicon carbide as a main component on the substrate, doping a main dopant for determining a conductivity type of the single-crystalline layer; implanting ions of an auxiliary dopant for capturing minority carriers into the single-crystalline layer with a dose such that a doping concentration of the auxiliary dopant is less than the doping concentration of the main dopant; activating the ions to form a buffer layer using the single-crystalline layer, so that the buffer layer enhances capturing and extinction of the minority carriers, the minority carriers flowing in a direction from the voltage-blocking-layer to the substrate, and so that the buffer layer has a lower resistivity than the voltage-blocking-layer; and epitaxially growing the voltage-blocking-layer on the buffer layer.

10 . An epitaxial wafer comprising:
a silicon carbide substrate; a silicon carbide voltage-blocking-layer; and a buffer layer provided between the substrate and the voltage-blocking-layer, the buffer layer being doped with a main dopant for determining a conductivity type and an auxiliary dopant for capturing minority carriers, the auxiliary dopant having a lower doping concentration than the doping concentration of the main dopant, the buffer layer enhances capturing and extinction of the minority carriers, the minority carriers flowing in a direction from the voltage-blocking-layer to the substrate, the buffer layer having a lower resistivity than the voltage-blocking-layer, the buffer layer including silicon carbide as a main component.

11 . A method for manufacturing a semiconductor device using an epitaxial wafer comprising a silicon carbide substrate and a silicon carbide voltage-blocking-layer, the epitaxial wafer manufactured by the method according to claim 1 , the method including:
forming a semiconductor region of a second conductivity type in a portion of an upper part of the voltage-blocking-layer of a first conductivity type.

12 . A method for manufacturing a semiconductor device using an epitaxial wafer comprising a silicon carbide substrate and a silicon carbide voltage-blocking-layer, the epitaxial wafer manufactured by the method according to claim 9 , the method including:
forming a semiconductor region of a second conductivity type in a portion of an upper part of the voltage-blocking-layer of a first conductivity type.

13 . A semiconductor device using the epitaxial wafer having the silicon carbide substrate and the silicon carbide voltage-blocking-layer, the epitaxial wafer according to claim 10 , the semiconductor device comprising:
a semiconductor region of a second conductivity type provided in a portion of an upper part of the voltage-blocking-layer of a first conductivity type.

Assignees

• Fuji Electric Co Ltd

Inventors

• Tsuchida Hidekazu
• Miyazawa Tetsuya
• Yonezawa Yoshiyuki
• Kato Tomohisa
• Kojima Kazutoshi
• Tawara Takeshi
• OTSUKl Akihiro

Classifications

• H10P30/2042

  into crystalline silicon carbide · CPC title

• H10P30/21

  of electrically active species · CPC title

• H10P14/3446

  Transition metal elements; Rare earth elements · CPC title

• H10P14/3444

  P-type · CPC title

• H10P14/3442

  N-type · CPC title