System and methods for aging compensation in amoled displays

Patent metadata

Field	Value
Publication number	US-2018005557-A1
Application number	US-201715703260-A
Country	US
Kind code	A1
Filing date	Sep 13, 2017
Priority date	Nov 30, 2009
Publication date	Jan 4, 2018
Grant date	—

Abstract

Methods and systems to provide baseline measurements for aging compensation for a display device are disclosed. An example display system has a plurality of active pixels and a reference pixel. Common input signals are provided to the reference pixel and the plurality of active pixels. The outputs of the reference pixel is measured and compared to the output of the active pixels to determine aging effects. The display system may also be tested applying a first known reference current to a current comparator with a second variable reference current and the output of a device under test such as one of the pixels. The variable reference current is adjusted until the second current and the output of the device under test is equivalent of the first current. The resulting current of the device under test is stored in a look up table for a baseline for aging measurements during the display system operation. The display system may also be tested to determine production flaws by determining anomalies such as short circuits in pixel components such as OLEDs and drive transistors.

First claim

1 - 14 . (canceled)

15 . A method for determining data for production of a display device having a plurality of pixels, the method comprising:
applying a test signal to each of the plurality of pixels; measuring voltage and current characteristics for each of the pixels; determining if anomalies exist for each of the pixels; reading anomaly data from the pixels demonstrating anomalies; and storing the anomaly data.

16 . The method of claim 15 , wherein the stored anomaly data is analyzed to determine flaws in the production process of the display device.

17 . The method of claim 15 , wherein the stored anomaly data is analyzed to determine flaws in the display device.

18 . The method of claim 15 , wherein the pixels include an organic light emitting device and a drive transistor and wherein the anomalies include a shorted organic light emitting device and a shorted drive transistor.

19 . A display system comprising:
an array of pixels to display images; a memory including characteristic data; a profile generator coupled to the memory to generate a plurality of luminance profiles based on the characteristic data; and a controller coupled to the profile generator and the array of pixels to change the luminance of the array of pixels according to a selected one of the plurality of luminance profiles.

20 . The display system of claim 19 , wherein the characteristics include OLED characteristics of the pixels, backplane characteristics and predetermined specifications for the display.

21 . The display system of claim 19 , wherein the selected luminance profile is selected based on external conditions affecting the display system or on an application of the images displayed on the array of pixels.

22 . The display system of claim 19 , further comprising an aging decision machine coupled to the controller to adjust image data sent to the array of pixels to compensate for aging.

Assignees

• Ignis Innovation Inc

Inventors

• Chaji Gholamreza
• Dionne Joseph Marcel
• Azizi Yaser
• Jaffari Javid
• Hormati Abbas
• Liu Tong
• Alexander Stefan

Classifications

• G09G3/006 Primary

  Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays (testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309) · CPC title

• G09G3/3233

  with pixel circuitry controlling the current through the light-emitting element · CPC title

• G09G2320/029

  by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel · CPC title

• G09G2320/0295

  by monitoring each display pixel · CPC title

• G09G2300/0842

  forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title