Handling memory errors in memory modules that include volatile and non-volatile components

Patent metadata

Field	Value
Publication number	US-2018004591-A1
Application number	US-201515540232-A
Country	US
Kind code	A1
Filing date	Jan 12, 2015
Priority date	Jan 12, 2015
Publication date	Jan 4, 2018
Grant date	—

Abstract

In one example in accordance with the present disclosure, a system for handling memory errors includes a memory module having volatile components and non-volatile components. The system includes a BIOS chip having BIOS code and a BIOS non-volatile (NV) memory. The BIOS NV memory stores error data associated with the memory module that was stored prior to a power-on or reset of the system. The system includes a processor to execute the BIOS code to, after the power-on or reset of the system end before an operating system is loaded; (1) read, from the BIOS NV memory, the error data; and (2) determine, based on the error data, whether to take a corrective action with respect to the memory module.

First claim

1 . A system for handling memory errors, the system comprising:
a memory module having volatile components and non-volatile components; a BIOS chip having BIOS code and a BIOS non-volatile (NV) memory, wherein the BIOS NV memory stores error data associated with the memory module that was stored prior to a power-on or reset of the system; and a processor to execute the BIOS code to, after the power-on or reset of the system and before an operating system is loaded:
read, from the BIOS NV memory, the error data; and
determine, based on the error data, whether to take a corrective action with respect to the memory module.

2 . The system of claim 1 , wherein the processor executes the BIOS code further to take the corrective action which is to cause data in the memory module to be reinitialized.

3 . The system of claim 2 , wherein causing data in the memory module to be reinitialized includes causing the volatile components in the memory module to be reinitialized, and wherein the memory module, upon reset, power-down, power loss or power failure, causes data in the volatile components to be copied to the non-volatile components.

4 . The system of claim 1 , wherein fie processor executes the BIOS code further to take the corrective action which is to disable the memory module and prevent its further use by the system.

5 . The system of claim 1 , wherein the error data includes a count of uncorrectable errors caused by the memory module, and wherein the determination of whether to take corrective action includes comparing the count to a defined threshold.

6 . The system of claim 1 , wherein the determination of whether to take the corrective action with respect to the memory module is further based on at least one user-selectable setting stored in the BIOS chip.

7 . The system of claim 1 , wherein the processor executes the BIOS code further to determine what type of corrective action to take with respect to the memory module, and wherein this determination is based on at least one user-selectable setting stored in the BIOS chip.

8 . The system of claim 1 , wherein the processor executes the BIOS code to, prior to the power-on or reset of the system, store or update, in the BIOS NV memory, the error data.

9 . The system of claim 8 , wherein the store or update of the error data is based on detected errors associated with the memory module during runtime, prior to the power-on or reset of the system.

10 . A method for handling memory errors, the method comprising:
detecting, by a processor of a system, errors associated with a memory module of the system, the memory module having volatile components and non-volatile components; storing, in a non-volatile memory of a firmware chip of the system, error data associated with the detected errors; powering-on or resetting the system after the storing; before loading an operating system, reading the error data from the non-volatile memory of the firmware chip; and determining, based on the error data, that errors occurred in the memory module prior to the power-on or reset and that a corrective action should be taken with respect to the memory module.

11 . The method of claim 10 , wherein the storing is done based on a determination that the memory module is a particular type of memory module that includes volatile and non-volatile components.

12 . The method of claim 10 , wherein the storing is done based on a determination that the defected errors are uncorrectable errors.

13 . A machine-readable storage medium encoded with instructions for handling memory errors, the instructions executable by a processor of a system to cause the system to:
receive indications of errors associated with a memory module of the system, the memory module having volatile components and non-volatile components; store, prior to a power-on or reset of the system, in a BIOS non-volatile memory of the system, error data associated with the errors; after the power-on or reset and before loading an operating system, read the error data from the BIOS non-volatile memory; and determine, based on the error data, whether to take a corrective action with respect to the memory module.

14 . The machine-readable storage medium of claim 13 , wherein the error data includes a count of a number of errors caused by the memory module, and wherein the determination is to reinitialize the memory module if the counter is greater than a defined threshold.

15 . The machine-readable storage medium of claim 14 , wherein the determination is further to disable the memory module if the counter is greater than a second defined threshold.

Assignees

• Hewlett Packard Entpr Dev Lp

Inventors

• Volentine Robert J
• Wu Frank L

Classifications

• G06F11/073

  in a memory management context, e.g. virtual memory or cache management (memory management G06F12/00; testing of static memory units G11C29/00) · CPC title

• G06F11/079

  Root cause analysis, i.e. error or fault diagnosis (in a hardware test environment G06F11/22; in a software test environment G06F11/36) · CPC title

• G06F11/0751

  Error or fault detection not based on redundancy (power supply failures G06F1/30; network fault management H04L41/06) · CPC title

• G06F11/0787

  Storage of error reports, e.g. persistent data storage, storage using memory protection · CPC title

• G06F11/0793 Primary

  Remedial or corrective actions (recovery from an exception in an instruction pipeline G06F9/3861; by retry G06F11/1402; for recovering from a failure of a protocol instance or entity H04L69/40) · CPC title