Updating program code stored in an external non-volatile memory

Patent metadata

Field	Value
Publication number	US-2018004501-A1
Application number	US-201615198412-A
Country	US
Kind code	A1
Filing date	Jun 30, 2016
Priority date	Jun 30, 2016
Publication date	Jan 4, 2018
Grant date	—

Abstract

In a method of updating program code in an external non-volatile memory, updated program code is received at an Application Specific Integrated Circuitry (ASIC). The updated program code is received from a host device. The updated program code is stored in a volatile memory of the ASIC. The ASIC performs operations. The updated program code is copied from the volatile memory to a non-volatile memory while performing the operations. The non-volatile memory is located external to the ASIC.

First claim

What is claimed is:

1 . A method of updating program code in an external non-volatile memory, said method comprising:
at an Application Specific Integrated Circuitry (ASIC), receiving updated program code from a host device; storing said updated program code in a volatile memory of said ASIC; performing operations with said ASIC; and copying said updated program code from said volatile memory to a non-volatile memory while performing said operations, wherein said non-volatile memory is located external to said ASIC.

2 . The method as recited in claim 1 , further comprising:
responsive to completion of said copying, sending a completion message from said ASIC to said host device.

3 . The method as recited in claim 1 , wherein said receiving updated program code from a host device comprises:
receiving said updated program code from said host device upon boot-up of said ASIC.

4 . The method as recited in claim 1 , wherein said performing touch sensing operations and said copying said updated program code at least partially overlap in time.

5 . The method as recited in claim 1 , wherein said performing operations comprises:
performing touch sensing operations using said updated program code.

6 . The method as recited in claim 1 , wherein said performing operations comprises:
driving a sensor electrode for capacitive sensing.

7 . The method as recited in claim 1 , wherein said copying said updated program code from said volatile memory to said non-volatile memory while performing said operations comprises:
copying at least a portion of said updated program code from said volatile memory to said non-volatile memory while performing processing of capacitive sensing data.

8 . An Application Specific Integrated Circuit (ASIC) comprising:
a volatile memory; a first communication interface configured to couple with a host device, said host device external to said ASIC; a second communication interface coupled with said volatile memory and configured to couple with a non-volatile memory, said non-volatile memory located external to said ASIC; and a processor coupled with said volatile memory, said first communication interface, and said second communication interface, said processor configured to:
receive updated program code from said host device via said first communication interface;
store said updated program code in said volatile memory;
perform operations using said updated program code; and
copy said updated program code from said volatile memory to said non-volatile memory via said second communication interface.

9 . The ASIC of claim 8 , wherein said processor is further configured to:
drive a sensor electrode for capacitive sensing.

10 . The ASIC of claim 8 , wherein said processor is further configured to:
process capacitive sensing data received from at least one sensor electrode to determine a position of an input object relative to a sensing region of said at least one sensor electrode; and effect said copying of said updated program code from said volatile memory to said non-volatile memory while said capacitive resulting signal is being processed.

11 . The ASIC of claim 8 , wherein a first speed of communication of said updated program code between said host device and said ASIC is faster than a second speed of communication said updated program code between said ASIC and said non-volatile memory.

12 . The ASIC of claim 8 , wherein said performance of operations using said updated program code and said copying of said updated program code to said non-volatile memory at least partially overlap in time.

13 . The ASIC of claim 8 , wherein said updated program code comprises information selected from the list of information consisting of: ASIC configuration information, touch sensing frequency information; display operation information; sensor electrode drive information; and capacitive sensing mode information.

14 . A processing system for a capacitive sensing input device, said processing system comprising:
a volatile memory; and a processor coupled with said volatile memory, said processor configured to:
receive updated program code from a host device;
store said updated program code in said volatile memory;
perform operations using said updated program code; and
copy said updated program code from said volatile memory to a non-volatile memory, said non-volatile memory located external to said processing system.

15 . The processing system of claim 14 , wherein said processor is further configured to:
drive a sensor electrode for capacitive sensing.

16 . The processing system of claim 14 , wherein said processor is further configured to:
send a completion message to said host device after completion of copying said updated program code to said non-volatile memory.

17 . The processing system of claim 14 , wherein said processor is further configured to:
process capacitive sensing data received from at least one sensor electrode to determine a position of an input object relative to a sensing region of said at least one sensor electrode; and effect said copying of said updated program code from said volatile memory to said non-volatile memory while said capacitive resulting signal is being processed.

18 . The processing system of claim 14 , wherein a first speed of storing said updated program code in said volatile memory is faster than a second speed of copying said updated program code from said volatile memory to said non-volatile memory.

19 . The processing system of claim 14 , wherein said performance of operations using said updated program code and said copying of said updated program code to said non-volatile memory at least partially overlap in time.

20 . The processing system of claim 14 , wherein said updated program code comprises information selected from the list of information consisting of: Application Specific Integrated Circuit (ASIC) configuration information; touch sensing frequency information; display operation information; sensor electrode drive information; and capacitive sensing mode information.

Assignees

• Synaptics Inc

Inventors

• Wu Eric
• Uppalapati Padma
• Philip Jackson

Classifications

• G06F3/065

  Replication mechanisms · CPC title

• G06F3/0685

  Hybrid storage combining heterogeneous device types, e.g. hierarchical storage, hybrid arrays · CPC title

• G06F3/0619

  in relation to data integrity, e.g. data losses, bit errors · CPC title

• G06F8/65 Primary

  Updates (security arrangements therefor G06F21/57) · CPC title