Method of allocating upstream bandwidth resource and method of transmitting upstream data in orthogonal frequency division multiple access-open optical subscriber network
US-9225570-B2 · Dec 29, 2015 · US
US2017366385A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2017366385-A1 |
| Application number | US-201615184114-A |
| Country | US |
| Kind code | A1 |
| Filing date | Jun 16, 2016 |
| Priority date | Jun 16, 2016 |
| Publication date | Dec 21, 2017 |
| Grant date | — |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A modulator operable to control an oscillator is described. The modulator can include a memory that stores oscillator control values and a bit streaming block. The bit streaming block can generate a bit stream based on the oscillator control values and transmit the bit stream to the oscillator to control an oscillation frequency of the oscillator. The modulator can also include a bit streaming loader (BSL). The BSL can receive one or more of the oscillator control values from the memory, generate one or more corresponding bit values based on the one or more of the oscillator control values, and provide the one or more bit values to the bit streaming block. The bit streaming block can then generate the bit stream based the one or more bit values generated by the BSL.
Opening claim text (preview).
1 . A modulator operable to control an oscillator, the modulator comprising: a memory driven by a first clock signal having a first clock frequency, the memory being configured to store oscillator control values; a bit streaming loader (BSL) driven by the first clock signal and a second clock signal having a second clock frequency different from the first clock frequency, the BSL being configured to: receive one or more of the oscillator control values from the memory; and generate one or more corresponding bit values based on the one or more of the oscillator control values; and a bit streaming block driven by the second clock signal, the bit streaming block being configured to: generate a bit stream based on the one or more bit values generated by the BSL; and transmit the bit stream to the oscillator to control the oscillator. 2 - 4 . (canceled) 5 . The modulator of claim 1 , wherein the second clock frequency is greater than the first clock frequency. 6 . The modulator of claim 5 , wherein the first clock frequency is 100 MHz and the second clock frequency is 160 MHz. 7 . The modulator of claim 1 , wherein the oscillator control values define a voltage-to-frequency curve of the oscillator. 8 . The modulator of claim 1 , wherein the bit streaming block comprises one or more registers configured to generate the bit stream based on the bit values. 9 . The modulator of claim 1 , wherein the bit streaming block comprises a delta-sigma modulator configured to perform an interpolation operation on the bit values to generate the bit stream. 10 . A sensor system comprising: a sensor including an oscillator configured generate a oscillation signal having an oscillation frequency, the sensor being configured to measure an environmental condition and to generate a signal corresponding to the measured environmental condition based on the oscillation frequency; and a controller configured to generate a bit stream to control the oscillation frequency of the oscillator and to process the signal corresponding to the measured environmental condition, the controller including a modulator driven by a first clock signal having a first clock frequency and a second clock signal having a second clock frequency different from the first clock frequency, the modulator including: a memory configured to store oscillator control values; a bit streaming loader (BSL) configured to: receive one or more of the oscillator control values from the memory; generate one or more corresponding bit values based on the one or more of the oscillator control values; and a bit streaming block configured to: generate a bit stream based the one or more bit values generated by the BSL; and transmit the bit stream to the oscillator of the sensor to control the oscillation frequency of the oscillator. 11 . (canceled) 12 . The sensor system of claim 10 , wherein the memory is driven by the first clock signal, the bit streaming block is driven by the second clock signal, and the BSL is driven by both the first clock signal and the second clock signal. 13 . The sensor system of claim 10 , wherein the second clock frequency is greater than the first clock frequency. 14 . The sensor system of claim 13 , wherein the first clock frequency is 100 MHz and the second clock frequency is 160 MHz. 15 . The sensor system of claim 10 , wherein the oscillator control values define a voltage-to-frequency curve of the oscillator. 16 . The sensor system of claim 10 , wherein the bit streaming block comprises a delta-sigma modulator configured to perform an interpolation operation on the bit values to generate the bit stream. 17 . The sensor system of claim 10 , wherein the modulator further comprises a trigger generator configured to generate a trigger signal, the controller being configured to process the signal corresponding to the measured environmental condition based on the trigger signal. 18 . The sensor system of claim 17 , wherein the controller further comprises an analog-to-digital converter (ADC) configured to process the signal corresponding to the measured environmental condition based on the trigger signal, wherein the bit streaming block and the trigger generator are driven by a same one of the first or the second clock signals. 19 . A modulator operable to control an oscillator of a sensor, the modulator comprising: a memory driven by a first clock signal having a first clock frequency, the memory being configured to store oscillator control values; bit streaming loader (BSL) driven by the first clock signal and a second clock signal having a second clock frequency greater than the first clock frequency, the BSL being configured to: receive one or more of the oscillator control values from the memory; and generate one or more corresponding bit values based on the one or more of the oscillator control values; a bit streaming block driven by the second clock signal and being configured to: generate a bit stream based the one or more bit values generated by the BSL; and transmit the bit stream to the oscillator of the sensor to control the oscillation frequency of the oscillator; and a trigger generator driven by the second clock signal and being configured to generate a trigger signal to process a sensor signal from the sensor corresponding to an environmental condition measured by the sensor. 20 . (canceled) 21 . The modulator of claim 19 , wherein the sensor is a radar sensor and the environmental condition measured by the radar sensor includes position information and/or movement information of an object. 22 . The modulator of claim 1 , wherein the oscillator control values comprise non-linearity characteristics of the oscillator. 23 . (canceled) 24 . The sensor system of claim 12 , wherein the second clock frequency is greater than the first clock frequency. 25 . The modulator of claim 1 , wherein the bit streaming block is configured to transmit the bit stream to the oscillator to control an oscillation frequency of the oscillator.
Amplitude-modulated carrier systems, e.g. using on-off keying; Single sideband or vestigial sideband modulation (H04L27/32 takes precedence) · CPC title
in combination with other modulation techniques · CPC title
Frequency-modulated carrier systems, i.e. using frequency-shift keying (H04L27/32 takes precedence) · CPC title
Carrier regulation (of chaotic carriers H04L27/001; for multicarrier receivers H04L27/2657) · CPC title
Duration or width modulation {; Duty cycle modulation} · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.