Insulated gate device discharging

Patent metadata

Field	Value
Publication number	US-2017366181-A1
Application number	US-201715677513-A
Country	US
Kind code	A1
Filing date	Aug 15, 2017
Priority date	Jun 23, 2015
Publication date	Dec 21, 2017
Grant date	—

Abstract

A large-power insulated gate switching device (e.g., MOSFET) is used for driving relatively large surges of pulsed power through a load. The switching device has a relatively large gate capacitance which is difficult to quickly discharge. A gate charging and discharging circuit is provided having a bipolar junction transistor (BJT) configured to apply a charging voltage to charge the gate of the switching device where the BJT is configured to also discontinue the application of the charging voltage. An inductive circuit having an inductor is also provided. The inductive circuit is coupled to the gate of the switching device and further coupled to receive the charging voltage such that application of the charging voltage to the inductive circuit is with a polarity that induces a first current to flow through the inductor in a direction corresponding to charge moving away from the gate and such that discontinuation of the application of the charging voltage to the inductive circuit induces a second current flowing through the inductor in the direction corresponding to charge moving away from the gate such that the second current discharges the gate of the switching device. Faster turn off of the switching device is thus made possible and is synchronized to the discontinuation of the charging voltage.

First claim

1 - 20 . (canceled)

21 . A circuit adapted for charging and discharging a capacitive load, the circuit comprising:
a first transistor configured to apply a charging voltage to charge the capacitive load, the first transistor having a driving terminal connected directly to the capacitive load to apply said charging voltage, the first transistor further having a driven terminal coupled to a voltage source and a control terminal operable to selectively activate and deactivate the first transistor, where deactivation of the first transistor operates to discontinue the application of the charging voltage; and an inductive circuit having an inductance, the inductive circuit being coupled to the capacitive load, the inductive circuit being further coupled and configured to receive the charging voltage such that application of the charging voltage to the inductive circuit is with a polarity that induces a first current to flow through the inductance in a direction corresponding to charge moving away from the capacitive load and such that discontinuation of the application of the charging voltage to the inductive circuit induces a second current flowing through the inductance in the direction corresponding to charge moving away from the capacitive load such that the second current discharges the capacitive load.

22 . The circuit of claim 21 wherein:
the first transistor is further configured to receive an input pulse having a leading edge, trailing edge and a plateau level interposed between the leading and trailing edges; and
the configuration of the first transistor being such that the first transistor applies the charging voltage in response to receipt of the leading edge and discontinues application of the charging voltage in response to receipt of the trailing edge.

23 . The circuit of claim 22 wherein,
the trailing edge has a fall time of 1 ns or less.

24 . The circuit of claim 23 wherein,
the plateau level has a variable duration.

25 . The circuit of claim 24 wherein,
the leading edge has a rise time of less than 1 ns.

26 . The circuit of claim 23 wherein;
the inductive circuit and the capacitive load are connected in parallel one to the other to thereby define an RLC loop; and
each of the inductive circuit and the capacitive load has a respective end directly connected to a wide area ground plane such that the wide area ground plane does not substantially alter an RLC characteristic of the RLC loop.

27 . The circuit of claim 22 wherein, the first transistor is further configured to supply a trickle current to the inductive circuit while receiving the plateau level of the input pulse.

28 . The circuit of claim 22 further comprising a second transistor, wherein the first transistor is an NPN bipolar junction transistor, the second transistor is a PNP bipolar junction transistor (BJT) and the second BJT is configured to partially discharge the capacitive load.

29 . The circuit of claim 21 wherein:
the inductive circuit and the capacitive load are connected in parallel one to the other.

30 . The circuit of claim 21 wherein,
the inductive circuit constitutes a variable inductance circuit having one or more programmably selectable inductances, where the variable inductance circuit is coupled to the capacitive load, where the variable inductance circuit is further coupled and configured to receive the charging voltage such that application of the charging voltage to the variable inductance circuit is with a polarity that induces a first current to flow through at least a programmably selectable first inductance of the variable inductance circuit and in a direction corresponding to charge moving away from the first capacitance and such that discontinuation of the application of the charging voltage to the variable inductance circuit induces a second current flowing through at least the programmably selectable first inductance in the direction corresponding to charge moving away from the first capacitance such that the second current discharges the first capacitance.

31 . The circuit of claim 30 wherein:
the variable inductance circuit includes one or more non-inductive elements operatively coupled to at least the programmably selectable first inductance; and
the one or more non-inductive elements in combination with at least the programmably selectable first inductance define a Y-shaped network.

32 . The circuit of claim 21 wherein:
the inductive circuit includes one or more non-inductive elements operatively coupled to the inductance of the inductive circuit; and
the one or more non-inductive elements in combination with the inductance define a Y-shaped network.

33 . The circuit of claim 21 and further comprising:
the voltage source is a variable voltage supply operatively coupled to the driven terminal of the first transistor.

34 . The circuit of claim 21 wherein:
the capacitive load is a switching controlling part of a combination of a light emitter and a switching device that switches the light emitter on and off.

35 . A circuit adapted for charging and discharging a gate of a gate controlled switching device, the circuit comprising:
a first transistor configured to apply a charging voltage to charge the gate, the first transistor having a driving terminal connected directly to the gate to apply said charging voltage, the first transistor further having a driven terminal coupled to a voltage source and a control terminal operable to selectively activate and deactivate the first transistor, where deactivation of the first transistor operates to discontinue the application of the charging voltage; and an inductive circuit having an inductance, the inductive circuit being coupled to the gate, the inductive circuit being further coupled and configured to receive the charging voltage such that application of the charging voltage to the inductive circuit is with a polarity that induces a first current to flow through the inductance in a direction corresponding to charge moving away from the gate and such that discontinuation of the application of the charging voltage to the inductive circuit induces a second current flowing through the inductance in the direction corresponding to charge moving away from the gate such that the second current discharges the gate.

36 . The circuit of claim 35 wherein:
the gate of the gate controlled switching device has a parasitic capacitance; and
the inductive circuit and the parasitic capacitance are connected in parallel one to the other.

37 . The circuit of claim 35 wherein:
the inductive circuit constitutes a variable inductance circuit having one or more programmably selectable inductances, where the variable inductance circuit is coupled to the gate of the gate controlled switching device, where the variable inductance circuit is further coupled and configured to receive the charging voltage such that application of the charging voltage to the variable inductance circuit is with a polarity that induces a first current to flow through at least a programmably selectable first inductance of the variable inductance circuit and in a direction corresponding to charge moving away from the gate of the gate controlled switching device and such that discontinuation of the application of the charging voltage to the variable inductance circuit induces a second current flowing through at least the programmably selectable first inductance in the direction corresponding to charge moving away from the gate of the gate controlled switching device such that the second current discharges

Assignees

• Microsoft Technology Licensing Llc

Inventors

• Wyland David C
• Dutra Jonathan Alan

Classifications

• H03K17/04123

  in field-effect transistor switches · CPC title

• H03K5/1534

  Transition or edge detectors · CPC title

• H03K17/567 Primary

  Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT · CPC title

• H03K17/6877

  the control circuit comprising active elements different from those used in the output circuit · CPC title