Method of producing a semiconductor device with through-substrate via covered by a solder ball

Patent metadata

Field	Value
Publication number	US-2017365551-A1
Application number	US-201715691654-A
Country	US
Kind code	A1
Filing date	Aug 30, 2017
Priority date	Nov 23, 2011
Publication date	Dec 21, 2017
Grant date	—

Abstract

A semiconductor substrate is provided with an annular cavity extending from a front side of the substrate to an opposite rear side. A metallization is applied in the annular cavity, thereby forming a through-substrate via and leaving an opening of the annular cavity at the front side. A solder ball is placed above the opening and a reflow of the solder ball is effected, thereby forming a void of the through-substrate via, the void being covered by the solder ball.

First claim

We claim:

1 . A method of producing a semiconductor device, comprising:
providing a semiconductor substrate with an annular cavity extending from a front side of the substrate to an opposite rear side; applying a metallization in the annular cavity, thereby forming a through-substrate via and leaving an opening of the annular cavity at the front side; placing a solder ball above the opening; and effecting a reflow of the solder ball, thereby forming a void of the through-substrate via, the void being covered by the solder ball.

2 . The method of claim 1 , further comprising:
arranging an electrically conductive pad at the front side of the substrate on a pillar formed by a portion of the substrate that is surrounded by the annular cavity; electrically connecting the pad to the metallization; and effecting the reflow of the solder ball in such a way that the solder ball electrically contacts the pad.

3 . The method of claim 1 or 2 , further comprising:
forming the annular cavity having inner and outer sidewalls; and
arranging the metallization on the inner sidewall and a further metallization on the outer sidewall.

4 . The method of claim 3 , wherein
the metallization and the further metallization are formed separate from one another, so that a double through-substrate via is provided.

5 . The method of claim 3 , further comprising:
arranging an upper terminal layer at a front side of the substrate, the upper terminal layer being electrically connected to the further metallization; and effecting the reflow in such a way that the solder ball electrically contacts the upper terminal layer.

6 . The method of claim 5 , further comprising:
providing a metal pad that is separate from the upper terminal layer; and effecting the reflow in such a way that the solder ball electrically contacts the metal pad.

7 . The method of claim 3 , further comprising:
arranging an upper terminal layer at a front side of the substrate, the upper terminal layer being electrically connected to the further metallization; providing a metal pad that is separate from the upper terminal layer; and effecting the reflow in such a way that the solder ball electrically contacts the metal pad and is insulated from the upper terminal layer.

Assignees

• Ams Ag

Inventors

• Cassidy Cathal
• Schrems Martin
• Schrank Franz

Classifications

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/00

  Package configurations · CPC title

• H10W72/9415

  relative to the surface, e.g. recessed, protruding · CPC title

• H10W72/07254

  changes in dispositions · CPC title

• H10W72/01257

  by reflowing · CPC title