Multiple linear regulation

US2017354002A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2017354002-A1
Application numberUS-201715604137-A
CountryUS
Kind codeA1
Filing dateMay 24, 2017
Priority dateJun 2, 2016
Publication dateDec 7, 2017
Grant date

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A circuit comprises an amplifier and a plurality of channels, the plurality of channels including respective transistors. The respective transistors of the channels control respective magnitudes of respective currents of the channels according to an output of the amplifier. The respective transistors of the plurality of channels may be included in an auto-commutated circuit. A first Light Emitting Diode (LED) circuit may be coupled between a power source and a first channel of the plurality of channels. A second LED circuit may be coupled between the first channel and a second channel of the plurality of LED channels. The power source may provide rectified Alternating Current (AC).

First claim

Opening claim text (preview).

What is claimed is: 1 . A circuit comprising: a plurality of channels including respective transistors; and an amplifier; wherein the respective transistors of the channels control respective magnitudes of respective currents of the channels according to an output of the amplifier. 2 . The circuit of claim 1 , further comprising: a first Light Emitting Diode (LED) circuit coupled between a power source and a first channel of the plurality of channels; and a second LED circuit coupled between the first channel and a second channel of the plurality of LED channels. 3 . The circuit of claim 2 , wherein the power source provides rectified Alternating Current (AC). 4 . The circuit of claim 1 , wherein the output of the amplifier is coupled to the respective transistors of the plurality of channels. 5 . The circuit of claim 4 , wherein the output of the amplifier is coupled to one or more of the respective transistors of the plurality of channels using one or more respective voltage drop circuits. 6 . The circuit of claim 1 , wherein the respective transistors of the plurality of channels are included in an auto-commutated circuit. 7 . The circuit of claim 6 , wherein a transistor of the respective transistors of the plurality of channels is controlled according to a current of another transistor of the respective transistors of the plurality of channels. 8 . The circuit of claim 6 , wherein the auto-commutated circuit comprises: one or more blocking diodes each coupled between a first conduction terminal of a respective transistor of the plurality of channels and second conduction terminal of another of the respective transistors of the plurality of channels. 9 . The circuit of claim 8 , further comprising: a current sense resistor coupled between a current sense node and a ground, wherein a negative input of the amplifier is coupled to the current node, wherein a positive input of the amplifier is coupled to a reference voltage, and wherein the output of the amplifier is coupled to respective gates of the respective transistors of the plurality of channels. 10 . The circuit of claim 1 , wherein the respective transistor of the plurality of channels are included in a cascode stage of a cascode amplifier, and wherein the output of the amplifier is coupled to an input stage of the cascode amplifier. 11 . A method of controlling respective currents of a plurality of channels of a circuit, the method comprising: generating an amplifier output using an amplifier; selecting a selected channel from among the plurality of channels; and controlling a magnitude of a current of the selected channel using a transistor of the selected channel and according to the amplifier output. 12 . The method of claim 11 , further comprising: when the selected channel is a first channel of the plurality of channels, controlling a magnitude of a current through a first Light Emitting Diode (LED) circuit using a transistor of the first channel and the amplifier output; and when the selected channel is a second channel of the plurality of channels, controlling a magnitude of a current through the first LED circuit and a second LED circuit using a transistor of the second channel and the amplifier output, wherein the first LED circuit is coupled between a power source and the first channel, and wherein the second LED circuit is coupled between the first channel and the second channel. 13 . The method of claim 12 , further comprising: providing, using the power source, a rectified Alternating Current (AC) to the first LED circuit. 14 . The method of claim 12 , wherein a first conduction terminal of the transistor of the first channel is coupled to the first Light Emitting Diode (LED) circuit, wherein a first conduction terminal of the transistor of the second channel is coupled to the second LED circuit, and wherein a second conduction terminal of the transistor of the first channel is coupled, using a blocking diode, to the first conduction terminal of the transistor of the second channel. 15 . The method of claim 12 , further comprising generating a current sense voltage according to the current through the first LED circuit; generating the amplifier output according to a difference between the current sense voltage and a reference voltage, and supplying the amplifier output to respective control terminals of the transistor of the first channel and the transistor of the second channel. 16 . The method of claim 11 , wherein the amplifier output is coupled to the respective transistors of the plurality of channels. 17 . The method of claim 16 , wherein the amplifier output is coupled to one or more of the respective transistors of the plurality of channels using one or more respective voltage drop circuits. 18 . The method of claim 11 , further comprising: determining the selected channel according to one or more respective currents of the plurality of channels. 19 . The method of claim 18 , further comprising: controlling, according to a current of the selected channel, a transistor of a non-selected channel of the plurality of channels. 20 . The method of claim 11 , wherein the transistor of selected channel is included in a cascode stage of a cascode amplifier, and wherein the amplifier output is coupled to an input stage of the cascode amplifier.

Assignees

Inventors

Classifications

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Semiconductor lamps, e.g. solid state lamps [SSL] light emitting diodes [LED] or organic LED [OLED] · CPC title

  • Current mirror circuits · CPC title

  • H05B45/48Primary

    having LEDs organised in strings and incorporating parallel shunting devices · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2017354002A1 cover?
A circuit comprises an amplifier and a plurality of channels, the plurality of channels including respective transistors. The respective transistors of the channels control respective magnitudes of respective currents of the channels according to an output of the amplifier. The respective transistors of the plurality of channels may be included in an auto-commutated circuit. A first Light Emitt…
Who is the assignee on this patent?
Fairchild Korea Semiconductor Ltd
What technology area does this patent fall under?
Primary CPC classification H05B33/0809. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Dec 07 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).