Articles and methods of forming vias in substrates

Patent metadata

Field	Value
Publication number	US-2017352553-A1
Application number	US-201715609238-A
Country	US
Kind code	A1
Filing date	May 31, 2017
Priority date	Jun 1, 2016
Publication date	Dec 7, 2017
Grant date	—

Abstract

Methods of forming vias in substrates having at least one damage region extending from a first surface etching the at least one damage region of the substrate to form a via in the substrate, wherein the via extends through the thickness T of the substrate while the first surface of the substrate is masked. The mask is removed from the first surface of the substrate after etching and upon removal of the mask the first surface of the substrate has a surface roughness (Rq) of about less than 1.0 nm.

First claim

What is claimed is:

1 . A method of forming a via in a substrate having at least one damage region extending from a first surface, the method comprising:
etching the at least one damage region of the substrate to form a via in the substrate while the first surface of the substrate is masked; and removing the mask from the first surface of the substrate, wherein the first surface of the substrate has a surface roughness (Rq) of about less than 1.0 nm upon removal of the mask.

2 . The method of claim 1 , wherein the mask is selected from a group consisting of diphenylsilicon, phenylsilicon, methylphenylsilicon, and diamond-like carbon (DLC).

3 . The method of claim 2 , wherein the mask is DLC and the DLC is a hydrogenated amorphous carbon.

4 . The method of claim 1 , wherein the first surface of the substrate has a surface roughness (Rq) of about less than 0.6 nm upon removal of the mask.

5 . The method of claim 1 , wherein a second surface of the substrate opposite the first surface of the substrate is masked during etching.

6 . The method of claim 1 , wherein the mask is removed by oxidation.

7 . The method of claim 1 , wherein the via is blind via or a through via.

8 . The method of claim 1 , wherein the mask is selectively applied to the first surface of the substrate such that the damage region is unmasked.

9 . The method of claim 1 , wherein the substrate is a glass, ceramic, or glass-ceramic.

10 . The method of claim 1 , further comprising:
removably bonding the substrate to a carrier by disposing the first surface of the substrate on a bonding surface of the carrier.

11 . The method of claim 10 , further comprising, after removably bonding the substrate to the carrier, processing the substrate by at least one of applying alkaline cleaning solutions to the substrate, wet etching the substrate, polishing the substrate, metal plating the substrate, metal patterning the substrate by wet etching, depositing material onto the substrate, and annealing the substrate.

12 . The method of claim 11 , further comprising removing the carrier from the substrate.

13 . The method of claim 10 , wherein the substrate is removably bonded to the carrier using Van der Waals forces.

14 . An article comprising:
a substrate comprising a first surface and a second surface separated by a thickness T; at least one damage region within the substrate and extending from the first surface; and a first film layer disposed on an undamaged region of the first surface of the substrate, the first film layer selected from a group consisting of diphenylsilicon, phenylsilicon, methylphenylsilicon, and diamond-like carbon (DLC).

15 . The article of claim 14 , further comprising a second film layer disposed on the undamaged region of the second surface of the substrate, the second film layer selected from a group consisting of diphenylsilicon, phenylsilicon, methylphenylsilicon, and diamond-like carbon (DLC).

16 . The article of claim 14 , wherein the first film is DLC and the DLC is a hydrogenated amorphous carbon.

17 . The article of claim 14 , wherein the substrate is a glass, ceramic, or glass-ceramic.

Assignees

• Corning Inc

Inventors

• Bellman Robert Alan
• Liu Shiwen

Classifications

• H10P72/74

  using temporarily an auxiliary support · CPC title

• H10P50/692

  characterised by their composition, e.g. multilayer masks or materials · CPC title

• H10P50/73

  using masks for insulating materials · CPC title

• H10W20/023

  the interconnections being through-semiconductor vias · CPC title

• H10W70/635

  Through-vias · CPC title