Memory performance evaluation using address mapping information
US-2024394164-A1 · Nov 28, 2024 · US
US2017337104A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2017337104-A1 |
| Application number | US-201615378569-A |
| Country | US |
| Kind code | A1 |
| Filing date | Dec 14, 2016 |
| Priority date | May 20, 2016 |
| Publication date | Nov 23, 2017 |
| Grant date | — |
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A method of storing at least one counter into a flash memory, wherein each page of the memory assigned to the storage of the counter(s) includes: header data including a first word intended to contain a number of the page, one word per counter to store a first value thereof, and a second word intended to contain an error control code calculated by taking into account the first values; frames all having a same number of words, each frame being intended to contain a value independent from the frame data, and at least one occurrence of an identifier of a counter, each written frame representing an increment or decrement of the value of the concerned counter with respect to its first value.
Opening claim text (preview).
What is claimed is: 1 . A method, comprising: calculating an initial error control code taking into account a first value of a counter; and storing the counter into a selected page of a flash memory having a plurality of pages, wherein the storing includes: writing header data into the selected page, the header data including a first word containing a number of the page, a second word containing a first value of the counter, and a third word containing the initial error control code; writing counter information into frames of the selected page, the frames all having a same number of words, wherein, for each frame, writing the counter information includes writing into the frame a counter identifier that identifies the counter, the counter identifier representing an increment or decrement of the concerned counter; and writing into each frame in which the counter identifier, a value independent from the identifier of the counter. 2 . The method of claim 1 , wherein writing the counter information includes updating a value of the counter by writing the counter information into a new frame of the selected page. 3 . The method of claim 1 , wherein the counter information is written sequentially into the frames of the selected page. 4 . The method of claim 1 , wherein writing the counter information includes, for each frame, calculating a frame error control code word by taking into account the counter identifier in the frame. 5 . The method of claim 1 , wherein said value independent from the counter identifier is the same for all the frames in the page. 6 . The method of claim 1 , wherein said header data are written before a first frame is written into the page. 7 . The method of claim 1 , further comprising calculating a current value of the counter by incrementing or decrementing the counter a number of times equal to how many frames in the page include the counter identifier of the counter. 8 . The method of claim 1 , wherein writing the counter information includes, each frame, writing an increment value or a decrement value of the counter into the frame. 9 . The method of claim 8 , further comprising calculating a current value of the counter by incrementing or decrementing the counter by the increment or decrement value a number of times equal to how many frames in the page include the counter identifier of the counter. 10 . The method of claim 1 , wherein writing header data into the selected page goes includes calculating the first value of the counter based on a previous counter value in a previous page. 11 . A flash memory control circuit that, in operation, performs a method comprising: calculating an initial error control code taking into account a first value of a counter; and storing the counter into a selected page of a flash memory having a plurality of pages, wherein the storing includes: writing header data into the selected page, the header data including a first word containing a number of the page, a second word containing a first value of the counter, and a third word containing the initial error control code; writing counter information into frames of the selected page, the frames all having a same number of words, wherein, for each frame, writing the counter information includes writing into the frame a counter identifier that identifies the counter, the counter identifier representing an increment or decrement of the concerned counter; and writing into each frame in which the counter identifier, a value independent from the identifier of the counter. 12 . The flash memory control circuit of claim 11 , wherein writing the counter information includes updating a value of the counter by writing the counter information into a new frame of the selected page. 13 . The flash memory control circuit of claim 11 , wherein the method includes calculating a current value of the counter by incrementing or decrementing the counter a number of times equal to how many frames in the page include the counter identifier of the counter. 14 . The flash memory control circuit of claim 11 , wherein writing the counter information includes, each frame, writing an increment value or a decrement value of the counter into the frame, and the method includes calculating a current value of the counter by incrementing or decrementing the counter by the increment or decrement value a number of times equal to how many frames in the page include the counter identifier of the counter. 15 . The flash memory control circuit of claim 11 , wherein writing header data into the selected page goes includes calculating the first value of the counter based on a previous counter value in a previous page. 16 . An electronic circuit comprising: a flash memory; and a flash memory control circuit that, in operation, performs a method that includes: calculating an initial error control code taking into account a first value of a counter; and storing the counter into a selected page of a flash memory having a plurality of pages, wherein the storing includes: writing header data into the selected page, the header data including a first word containing a number of the page, a second word containing a first value of the counter, and a third word containing the initial error control code; writing counter information into frames of the selected page, the frames all having a same number of words, wherein, for each frame, writing the counter information includes writing into the frame a counter identifier that identifies the counter, the counter identifier representing an increment or decrement of the concerned counter; and writing into each frame in which the counter identifier, a value independent from the identifier of the counter. 17 . The electronic circuit of claim 16 , wherein writing the counter information includes updating a value of the counter by writing the counter information into a new frame of the selected page. 18 . The electronic circuit of claim 16 , wherein the method includes calculating a current value of the counter by incrementing or decrementing the counter a number of times equal to how many frames in the page include the counter identifier of the counter. 19 . The electronic circuit of claim 16 , wherein writing the counter information includes, each frame, writing an increment value or a decrement value of the counter into the frame, and the method includes calculating a current value of the counter by incrementing or decrementing the counter by the increment or decrement value a number of times equal to how many frames in the page include the counter identifier of the counter. 20 . The electronic circuit of claim 16 , wherein writing header data into the selected page goes includes calculating the first value of the counter based on a previous counter value in a previous page.
Reliability improvement, data loss prevention, degraded operation etc · CPC title
Reversible counters (H03K23/52 {and H03K23/548} take precedence) · CPC title
Validity control, e.g. using flags, time stamps or sequence numbers · CPC title
in block erasable memory, e.g. flash memory · CPC title
management of metadata or control data · CPC title
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