Epitaxial wafer, semiconductor device, method for producing epitaxial wafer, and method for producing semiconductor device

Patent metadata

Field	Value
Publication number	US-2017323960-A1
Application number	US-201515525153-A
Country	US
Kind code	A1
Filing date	Nov 6, 2015
Priority date	Nov 25, 2014
Publication date	Nov 9, 2017
Grant date	—

Abstract

An epitaxial wafer including: a silicon-based substrate; a first buffer layer on the substrate and including a first multilayer structure buffer region composed of Al x Ga 1-x N layers and Al y Ga 1-y N layers (x>y) alternately disposed and a first insertion layer composed of an Al z Ga 1-z N layer (x>z) and is thicker than the Al y Ga 1-y N layer, the first regions and insertion layers alternately disposed; a second buffer layer on the first and including a second multilayer structure buffer region composed of Al α Ga 1-α N layers and Al β Ga 1-β N layers (α>β) alternately disposed and a second insertion layer composed of an Al γ Ga 1-γ N layer (α>γ) and is thicker than the Al β Ga 1-β N layer, the second regions and insertion layers alternately disposed; and a channel layer on the second buffer layer and thicker than the second insertion layer. The average Al composition in the second buffer layer is higher than that in the first.

First claim

1 - 11 . (canceled)

12 . An epitaxial wafer comprising:
a silicon-based substrate; a first buffer layer that is disposed on the silicon-based substrate and includes a first multilayer structure buffer region composed of Al x Ga 1-x N layers and Al y Ga 1-y N layers (x>y) which are alternately disposed and a first insertion layer which is composed of an Al z Ga 1-z N layer (x>z) and is thicker than the Al y Ga 1-y N layer, the second insertion layer being thinner than the first insertion layer, the first multilayer structure buffer regions and the first insertion layers being alternately disposed; a second buffer layer that is disposed on the first buffer layer and includes a second multilayer structure buffer region composed of Al α Ga 1-α N layers and Al β Ga 1-β N layers (α>β) which are alternately disposed and a second insertion layer which is composed of an Al γ Ga 1-γ N layer (α>γ) and is thicker than the Al β Ga 1-β N layer, the second multilayer structure buffer regions and the second insertion layers being alternately disposed; and a channel layer that is disposed on the second buffer layer and is thicker than the second insertion layer, wherein an average Al composition in the second buffer layer is higher than an average Al composition in the first buffer layer.

13 . The epitaxial wafer according to claim 12 , wherein
a number of repetitions of the Al α Ga 1-α N layers and the Al β Ga 1-β N layers of the second multilayer structure buffer region is larger than a number of repetitions of the Al x Ga 1-x N layers and the Al y Ga 1-y N layers of the first multilayer structure buffer region.

14 . The epitaxial wafer according to claim 12 , wherein
each of the Al β Ga 1-β N layers of the second multilayer structure buffer region is thinner than each of the Al y Ga 1-y N layers of the first multilayer structure buffer region.

15 . The epitaxial wafer according to claim 12 , wherein
each of the Al α Ga 1-α N layers of the second multilayer structure buffer region is thicker than each of the Al x Ga 1-x N layers of the first multilayer structure buffer region.

16 . The epitaxial wafer according to claim 12 , wherein
in the Al α Ga 1-α N layers of the second multilayer structure buffer region and the Al x Ga 1-x N layers of the first multilayer structure buffer region, x<α is satisfied.

17 . The epitaxial wafer according to claim 13 , wherein
in the Al α Ga 1-α N layers of the second multilayer structure buffer region and the Al x Ga 1-x N layers of the first multilayer structure buffer region, x<α is satisfied.

18 . The epitaxial wafer according to claim 14 , wherein
in the Al α Ga 1-α N layers of the second multilayer structure buffer region and the Al x Ga 1-x N layers of the first multilayer structure buffer region, x<α is satisfied.

19 . The epitaxial wafer according to claim 15 , wherein
in the Al α Ga 1-α N layers of the second multilayer structure buffer region and the Al x Ga 1-x N layers of the first multilayer structure buffer region, x<α is satisfied.

20 . The epitaxial wafer according to claim 12 , wherein
in the Al β Ga 1-β N layers of the second multilayer structure buffer region and the Al y Ga 1-y N layers of the first multilayer structure buffer region, y<β is satisfied.

21 . A semiconductor device comprising:
the epitaxial wafer according to claim 12 ; a barrier layer that is composed of a gallium nitride-based semiconductor and is disposed on the epitaxial wafer; and a first electrode, a second electrode, and a control electrode which are disposed on the barrier layer.

22 . A semiconductor device comprising:
the epitaxial wafer according to claim 13 ; a barrier layer that is composed of a gallium nitride-based semiconductor and is disposed on the epitaxial wafer; and a first electrode, a second electrode, and a control electrode which are disposed on the barrier layer.

23 . A semiconductor device comprising:
the epitaxial wafer according to claim 14 ; a barrier layer that is composed of a gallium nitride-based semiconductor and is disposed on the epitaxial wafer; and a first electrode, a second electrode, and a control electrode which are disposed on the barrier layer.

24 . A semiconductor device comprising:
the epitaxial wafer according to claim 15 ; a barrier layer that is composed of a gallium nitride-based semiconductor and is disposed on the epitaxial wafer; and a first electrode, a second electrode, and a control electrode which are disposed on the barrier layer.

25 . A semiconductor device comprising:
the epitaxial wafer according to claim 16 ; a barrier layer that is composed of a gallium nitride-based semiconductor and is disposed on the epitaxial wafer; and a first electrode, a second electrode, and a control electrode which are disposed on the barrier layer.

26 . A semiconductor device comprising:
the epitaxial wafer according to claim 17 ; a barrier layer that is composed of a gallium nitride-based semiconductor and is disposed on the epitaxial wafer; and a first electrode, a second electrode, and a control electrode which are disposed on the barrier layer.

27 . A semiconductor device comprising:
the epitaxial wafer according to claim 18 ; a barrier layer that is composed of a gallium nitride-based semiconductor and is disposed on the epitaxial wafer; and a first electrode, a second electrode, and a control electrode which are disposed on the barrier layer.

28 . A semiconductor device comprising:
the epitaxial wafer according to claim 19 ; a barrier layer that is composed of a gallium nitride-based semiconductor and is disposed on the epitaxial wafer; and a first electrode, a second electrode, and a control electrode which are disposed on the barrier layer.

29 . A semiconductor device comprising:
the epitaxial wafer according to claim 20 ; a barrier layer that is composed of a gallium nitride-based semiconductor and is disposed on the epitaxial wafer; and a first electrode, a second electrode, and a control electrode which are disposed on the barrier layer.

30 . A method for producing an epitaxial wafer, comprising:
preparing a silicon-based substrate; forming, on the silicon-based substrate by epitaxial growth, a first buffer layer including a first multilayer structure buffer region composed of Al x Ga 1-x N layers and Al y Ga 1-y N layers (x>y) which are alternately disposed and a first insertion layer which is composed of an Al z Ga 1-z N layer (x>z) and is thicker than the Al y Ga 1-y N layer, the first multilayer structure buffer regions and the first insertion layers being alternately disposed; forming, on the first buffer layer by epitaxial growth, a second buffer layer including a second multilayer structure buffer region composed of Al α Ga 1-α N layers and Al β Ga 1-β N layers (α>β) which are alternately disposed and a second insertion layer which is composed of an Al γ Ga 1-γ N layer (α>γ) and is thicker than the Al β Ga 1-β N layer, the second multilayer structure buffer regions and the second insertion layers being alternately disposed; and forming a channel layer that is thicker than the second insertion layer on the second buffer layer by epitaxial growth, wherein an average Al composition in the second buffer layer is made higher than an average Al composition in the first buffer layer, and wherein the second insertion layer is made thinner than the first insertion layer.

31 . A method for producing a semiconductor device, comprising:

Assignees

• Sanken Electric Co Ltd
• Shinetsu Handotai Kk

Inventors

• Sato Ken
• Shikauchi Hiroshi
• Goto Hirokazu
• Shinomiya Masaru
• Tsuchiya Keitaro
• Hagimoto Kazunori

Classifications

• H10P14/3416

  Nitrides · CPC title

• H10P14/3252

  Alternating layers, e.g. superlattice · CPC title

• H10P14/3216

  Nitrides · CPC title

• H10P14/2905

  Silicon, silicon germanium or germanium · CPC title

• C30B29/403

  AIII-nitrides · CPC title