Semiconductor device and semiconductor die
US-2024387542-A1 · Nov 21, 2024 · US
Semiconductor device and method of forming the same
US2017263608A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2017263608-A1 |
| Application number | US-201715604638-A |
| Country | US |
| Kind code | A1 |
| Filing date | May 24, 2017 |
| Priority date | Mar 19, 2015 |
| Publication date | Sep 14, 2017 |
| Grant date | — |
How to read this patent
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
- Title
What the patent document calls the invention.
- Abstract
A short plain-language summary of the technical disclosure.
- Assignees and inventors
Who owns or filed the patent and who is credited as inventor.
- Key dates
Filing, priority, publication, and grant dates set the timeline.
- First independent claim
The legal scope of protection — read this for what is actually claimed.
- CPC / IPC classifications
Technology tags used to group this patent with similar filings.
- Citations and related patents
Prior art links and similar publications in this corpus.
Abstract
Official abstract text for this publication.
The present invention provides a semiconductor device and a method of forming the same. The semiconductor device includes a substrate, a first transistor and a second transistor. The first transistor and the second transistor are disposed on the substrate. The first transistor includes a first channel and a first work function layer. The second transistor includes a second channel and a second work function layer, where the first channel and the second channel include different dopants, and the second work function layer and the first work function layer have a same conductive type and different thicknesses.
First claim
Opening claim text (preview).
What is claimed is: 1 . A semiconductor device, comprising: a substrate; a first gate structure disposed on the substrate, the first gate structure comprising: a first channel; and a first work function layer; and a second gate structure disposed on the substrate, the second gate structure comprising: a second channel, wherein the second channel comprises different dopants from that of the first channel; and a second work function layer, wherein the second work function layer and the first work function layer have a same conductive type and different thicknesses. 2 . The semiconductor device according to claim 1 , wherein the first work function layer and the second work function layer comprise different materials. 3 . The semiconductor device according to claim 1 , further comprising: a third gate structure disposed on the substrate, wherein the third gate structure comprises: a third channel, wherein the third channel comprises different dopants from that of the first channel and the second channel; and a third work function layer, having a conductive type different from that of the first work function layer and the second work function layer. 4 . The semiconductor device according to claim 1 , wherein the second channel layer and the first channel layer comprise different dopant dosages. 5 . The semiconductor device according to claim 1 , wherein the second channel layer and the first channel layer comprise different dopant materials.
Assignees
Inventors
Classifications
into Group IV semiconductors · CPC title
of electrically active species · CPC title
Electricity · mapped topic
Electricity · mapped topic
- H01L27/0922Primary
Electricity · mapped topic
Patent family
Related publications grouped by family.
External sources
Frequently asked questions
Answers are generated from the same data shown on this page.
- What does patent US2017263608A1 cover?
- The present invention provides a semiconductor device and a method of forming the same. The semiconductor device includes a substrate, a first transistor and a second transistor. The first transistor and the second transistor are disposed on the substrate. The first transistor includes a first channel and a first work function layer. The second transistor includes a second channel and a second …
- Who is the assignee on this patent?
- United Microelectronics Corp
- What technology area does this patent fall under?
- Primary CPC classification H01L27/0922. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Thu Sep 14 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).