Imaging systems with flicker mitigation and high dynamic range

Patent metadata

Field	Value
Publication number	US-2017257580-A1
Application number	US-201715597326-A
Country	US
Kind code	A1
Filing date	May 17, 2017
Priority date	Sep 30, 2015
Publication date	Sep 7, 2017
Grant date	—

Abstract

An image pixel may include a shutter element that is operable in an open state during which a corresponding photodiode accumulates charge and a closed state during which charge is drained from the photodiode. During a first portion of an image frame, the image pixel may operate in a flicker mitigation mode in which a non-continuous exposure period is used. During a second portion of the image frame, the image pixel may operate in a high dynamic range mode in which images are obtained with exposures of varying lengths. To conserve memory requirements, the signal from the flicker mitigation mode may not be sampled until the end of the first exposure of the high dynamic range mode.

First claim

What is claimed is:

1 . A method for capturing image data for an image pixel during an image frame, wherein the image pixel comprises a photodiode, a charge storage region, a transfer transistor coupled between the charge storage region and the photodiode, and a charge readout circuit coupled between the charge storage region and an output line, the method comprising:
during a first time period, accumulating charge during a first exposure period, wherein the charge accumulated during the first exposure period is transferred to the charge storage region with the transfer transistor; during a second time period subsequent to the first time period, accumulating charge during a second exposure period; and after the majority of the second time period has passed, supplying a first signal to the output line corresponding to the charge accumulated during the first exposure period.

2 . The method defined in claim 1 , wherein the image pixel further comprises a reset transistor, the method further comprising:
after supplying the first signal to the output line corresponding to the charge accumulated during the first exposure period, resetting the charge storage region with the reset transistor.

3 . The method defined in claim 2 , further comprising:
after resetting the charge storage region with the reset transistor, supplying a second signal to the output line corresponding to a reset level of charge.

4 . The method defined in claim 3 , further comprising:
after supplying the second signal to the output line corresponding to the reset level of charge, transferring the charge accumulated during the second exposure period to the charge storage region.

5 . The method defined in claim 4 , further comprising:
after transferring the charge accumulated during the second exposure period to the charge storage region, supplying a third signal to the output line corresponding to the charge accumulated during the second exposure period.

6 . The method defined in claim 5 , wherein transferring charge accumulated during the second exposure period to the charge storage region comprises transferring charge accumulated during the second exposure period to the charge storage region during the second time period and wherein supplying the third signal to the output line corresponding to the charge accumulated during the second exposure period comprises supplying the third signal to the output line corresponding to the charge accumulated during the second exposure period during a third time period that is subsequent to the second time period.

7 . The method defined in claim 6 , further comprising:
during the third time period, accumulating charge during a third exposure period, wherein the third exposure period is shorter than the second exposure period.

8 . The method defined in claim 1 , wherein the second time period immediately follows the first time period.

9 . A method for capturing image data for an image pixel during an image frame, wherein the image pixel comprises a photodiode, a charge storage region, and a charge readout circuit coupled between the charge storage region and an output line, the method comprising:
with the photodiode, accumulating an amount of charge for a first time period, wherein the amount of charge is stored in the charge storage region; with the photodiode, accumulating an additional amount of charge for a second time period that is subsequent to the first time period; and at the end of second time period, using the charge readout circuit to supply a first signal to the output line corresponding to the amount of charge on the charge storage region.

10 . The method defined in claim 9 , further comprising:
after using the charge readout circuit to supply the first signal to the output line corresponding to the amount of charge on the charge storage region, resetting the amount of charge at the charge storage region with a reset transistor.

11 . The method defined in claim 10 , further comprising:
after resetting the amount of charge at the charge storage region with the reset transistor, supplying a second signal to the output line corresponding to the amount of charge on the charge storage region.

12 . The method defined in claim 11 , further comprising:
using the second signal to correct for reset noise in the first signal.

13 . The method defined in claim 11 , further comprising:
after supplying the second signal to the output line corresponding to the amount of charge on the charge storage region, transferring the additional amount of charge that accumulated during the second time period to the charge storage region with a transfer transistor.

14 . The method defined in claim 13 , further comprising:
after transferring the additional amount of charge that accumulated during the second time period to the charge storage region, supplying a third signal to the output line corresponding to the additional amount of charge that accumulated during the second time period.

15 . The method defined in claim 9 , wherein the second time period immediately follows the first time period.

16 . A method for capturing image data for an image pixel during an image frame, wherein the image pixel comprises a photodiode, a charge storage region, a transfer transistor coupled between the charge storage region and the photodiode, a reset transistor, and a charge readout circuit coupled between the charge storage region and an output line, the method comprising:
during a first time period, accumulating charge in the photodiode during a first exposure period; transferring the charge accumulated during the first exposure period to the charge storage region using the transfer transistor; supplying a first signal to the output line corresponding to the charge accumulated during the first exposure period; after supplying the first signal to the output line corresponding to the charge accumulated during the first exposure period, resetting the charge storage region with the reset transistor; and after resetting the charge storage region with the reset transistor, supplying a second signal to the output line corresponding to a reset level of charge.

17 . The method defined in claim 16 , further comprising:
using the second signal to correct for reset noise in the first signal.

18 . The method defined in claim 16 , wherein supplying the first signal to the output line comprises supplying the first signal to the output line during a second exposure period and wherein an additional amount of charge is accumulated in the photodiode during the second exposure period.

19 . The method defined in claim 18 , wherein supplying the first signal to the output line comprises supplying the first signal to the output line after the majority of the second exposure period has passed.

20 . The method defined in claim 19 , wherein the second exposure period immediately follows the first exposure period.

Assignees

• Semiconductor Components Ind Llc

Inventors

• Barna Sandor

Classifications

• H04N25/589 Primary

  with different integration times, e.g. short and long exposures · CPC title

• H04N25/713

  Transfer or readout registers; Split readout registers or multiple readout registers · CPC title

• H04N23/73

  by influencing the exposure time · CPC title

• H04N25/77

  Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components · CPC title

• H04N23/741 Primary

  by increasing the dynamic range of the image compared to the dynamic range of the electronic image sensors · CPC title