Composition, laminate, method of manufacturing laminate, transistor, and method of manufacturing transistor

Patent metadata

Field	Value
Publication number	US-2017256331-A1
Application number	US-201715599078-A
Country	US
Kind code	A1
Filing date	May 18, 2017
Priority date	Jan 7, 2013
Publication date	Sep 7, 2017
Grant date	—

Abstract

A method of manufacturing a laminate, transistor, and method of manufacturing transistor using a composition that includes an organic compound having a hydroxy group; a first cross-linking agent that is at least one organic silicon compound selected from the group including an organic silicon compound including a siloxane bond in the molecule and having three or more cyclic ether groups in the molecule, a chain organic silicon compound including two or more siloxane bonds in the molecule and having two or more cyclic ether groups in the molecule, a cyclic organic silicon compound including D unit in the molecule and having four or more cyclic ether groups bonded to a silicon atom of the D unit in the molecule, and a cyclic organic silicon compound including a T unit in the molecule and having two or more cyclic ether groups in the molecule; and a photocationic polymerization initiator.

First claim

What is claimed is:

1 . A method of manufacturing a laminate, comprising:
applying a solution, containing a composition comprising an organic compound having a hydroxy group, a first cross-linking agent that is at least one organic silicon compound selected from the group including
an organic silicon compound including a siloxane bond in the molecule and having three or more cyclic ether groups in the molecule,
a chain organic silicon compound including two or more siloxane bonds in the molecule and having two or more cyclic ether groups in the molecule,
a cyclic organic silicon compound including a siloxane unit (D unit) represented by R 1 R 2 SiO 2/2 in the molecule, any one of or both of R 1 and R 2 being a cyclic ether group, and having four or more cyclic ether groups bonded to a silicon atom of the D unit in the molecule, and
a cyclic organic silicon compound including a siloxane unit (T unit) represented by R 3 SiO 3/2 in the molecule, R 3 being a cyclic ether group, and having two or more cyclic ether groups in the molecule; and
a photocationic polymerization initiator, over a conductive layer to form a coating film; selectively irradiating the coating film with light including light having an absorption wavelength of the photocationic polymerization initiator included in the coating film to form a latent image in the light-irradiated region of the coating film; and developing the coating film with an alkaline solution to form an insulator layer.

2 . The method of manufacturing a laminate according to claim 1 , further comprising:
prior to forming the coating film, applying a surface treatment on at least a region to be provided with the coating film by using a silane coupling agent having a cyclic ether group.

3 . A laminate, comprising:
a conductive layer; and an insulator layer formed by cationic-polymerization of a composition comprising an organic compound having a hydroxy group, a first cross-linking agent that is at least one organic silicon compound selected from the group including
an organic silicon compound including a siloxane bond in the molecule and having three or more cyclic ether groups in the molecule,
a chain organic silicon compound including two or more siloxane bonds in the molecule and having two or more cyclic ether groups in the molecule,
a cyclic organic silicon compound including a siloxane unit (D unit) represented by R 1 R 2 SiO 2/2 in the molecule, any one of or both of R 1 and R 2 being a cyclic ether group, and having four or more cyclic ether groups bonded to a silicon atom of the D unit in the molecule, and
a cyclic organic silicon compound including a siloxane unit (T unit) represented by R 3 SiO 3/2 in the molecule, R 3 being a cyclic ether group, and having two or more cyclic ether groups in the molecule, and
a photocationic polymerization initiator.

4 . The laminate according to claim 3 ,
wherein the conductive layer is covered with the insulator layer.

5 . A method of manufacturing a transistor, comprising:
forming a gate electrode on a substrate; applying a solution, including a composition comprising an organic compound having a hydroxy group, a first cross-linking agent that is at least one organic silicon compound selected from the group including
an organic silicon compound including a siloxane bond in the molecule and having three or more cyclic ether groups in the molecule,
a chain organic silicon compound including two or more siloxane bonds in the molecule and having two or more cyclic ether groups in the molecule,
a cyclic organic silicon compound including a siloxane unit (D unit) represented by R 1 R 2 SiO 2/2 in the molecule, any one of or both of R 1 and R 2 being a cyclic ether group, and having four or more cyclic ether groups bonded to a silicon atom of the D unit in the molecule, and
a cyclic organic silicon compound including a siloxane unit (T unit) represented by R3SiO3/2 in the molecule, R3 being a cyclic ether group, and having two or more cyclic ether groups in the molecule and
a photocationic polymerization initiator, over the gate electrode to form a coating film; selectively irradiating the coating film with light including light having an absorption wavelength of a photocationic polymerization initiator included in the coating film to form a latent image in the light-irradiated region of the coating film; developing the coating film with an alkaline solution to form an insulator layer; and forming a source electrode and a drain electrode on the surface of a layer including the insulator layer.

6 . The method of manufacturing a transistor according to claim 5 , further comprising:
prior to forming the coating film, applying a surface treatment on at least a region to be provided with the coating film by using a first silane coupling agent having a cyclic ether group.

7 . The method of manufacturing a transistor according to claim 5 ,
wherein at least one of the gate electrode, the source electrode, and the drain electrode is formed by: applying a formation material containing a second silane coupling agent having a group capable of capturing a metal, which is an electroless plating catalyst, to form a base film; and capturing the metal on the surface of the base film and then performing electroless plating.

8 . The method of manufacturing a transistor according to claim 7 ,
wherein the source electrode and the drain electrode are formed by: forming a source base film and a drain base film, each being the base film; and then capturing the metal on the surface of each of the source base film and the drain base film to perform electroless plating.

9 . The method of manufacturing a transistor according to claim 8 ,
wherein the source base film and the drain base film are formed as a continuous film.

10 . The method of manufacturing a transistor according to claim 7 ,
wherein the gate electrode is formed by forming a gate base film, which is the base film, and then capturing the metal on the surface of the gate base film to perform electroless plating.

11 . The method of manufacturing a transistor according to claim 7 ,
wherein the second silane coupling agent has an amino group.

12 . The method of manufacturing a transistor according to claim 11 ,
wherein the second silane coupling agent is a primary amine or a secondary amine.

13 . The method of manufacturing a transistor according to claim 7 ,
wherein the layer including the insulator layer includes: the insulator layer; and an organic semiconductor layer disposed on the insulator layer and having a surface on which the source electrode and the drain electrode are formed.

14 . The method of manufacturing a transistor according to claim 7 , comprising:
forming the source electrode and the drain electrode; and then forming an organic semiconductor layer that is in contact with surfaces of the source electrode and the drain electrode that face each other.

15 . The method of manufacturing a transistor according to claim 13 , comprising, prior to forming the source electrode and the drain electrode:
forming a resist layer having an opening corresponding to the source electrode and the drain electrode and capturing the metal on the surface of the base film formed on the surface exposed at least in the opening; performing first electroless plating and then removing the resist layer; and performing second electroless plating on the surface of an electrode formed by the first electroless plating to form the source electrode and the drain electrode, wherein the energy level d

Assignees

• Nikon Corp

Inventors

• Koizumi Shohei
• Sugizaki Takashi
• Miyamoto Kenji
• Kawakami Yusuke

Classifications

• H10P14/6922

  the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC · CPC title

• G03F7/40

  Treatment after imagewise removal, e.g. baking · CPC title

• C08G59/621

  Phenols · CPC title

• G03F7/038

  Macromolecular compounds which are rendered insoluble or differentially wettable (G03F7/075 takes precedence; macromolecular azides G03F7/012; macromolecular diazonium compounds G03F7/021) · CPC title

• C08G59/3254

  containing atoms other than carbon, hydrogen, oxygen or nitrogen · CPC title