Current limiter arrangement and method for manufacturing a current limiter arrangement

US2017237252A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2017237252-A1
Application numberUS-201415502657-A
CountryUS
Kind codeA1
Filing dateAug 8, 2014
Priority dateAug 8, 2014
Publication dateAug 17, 2017
Grant date

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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A current limiter arrangement limiting an electric current between a first and a second terminal includes a first current limiting device and a second current limiting device arranged between the first and the second terminal. The first and the second current limiting device each include a substrate having a substrate surface area and a substrate thickness, and include a superconducting section arranged on the substrate and thermally coupled to the substrate thereby covering a coupling surface area on the substrate. Each of the superconducting sections has a critical current value and the substrate surface areas, the substrate thicknesses and or the coupling surface areas are implemented as a function of the critical current values.

First claim

Opening claim text (preview).

1 - 17 . (canceled) 18 . A current limiter arrangement for limiting an electric current between a first and a second terminal comprising: a first current limiting device and a second current limiting device arranged between the first and the second terminal; the first and the second current limiting device each include a substrate having a substrate surface area and a substrate thickness, and include a superconducting section arranged on the substrate and thermally coupled to the substrate thereby covering a coupling surface area on the substrate; wherein each of the superconducting sections has a critical current value, and the substrate surface areas, the substrate thicknesses, and or the coupling surface areas are implemented as a function of the critical current values. 19 . The current limiter arrangement of claim 18 , wherein the substrate surface areas, the substrate thicknesses, and/or the coupling surface areas are implemented such that the recovery times of the first and the second current limiting device are within a predetermined range. 20 . The current limiter arrangement of claim 18 , wherein in at least one of the first or second current limiting device the substrate surface area is larger than the coupling surface area. 21 . The current limiter arrangement of claim 18 , wherein in at least one of the first or second current limiting device the substrate comprises at least two substrate sections that are at least section-wise separated from one another by a gap, and wherein the superconducting section and/or a third substrate section partially bridges the gap. 22 . The current limiter arrangement of claim 18 , wherein in at least one of the first or second current limiting device the substrate has a width that is larger than a width of coupling surface area. 23 . The current limiter arrangement of claim 18 , wherein the superconducting sections have essentially a same width. 24 . The current limiter arrangement of claim 18 , wherein in at least one of the first or second current limiting device the substrate thickness varies between the first and the second terminal. 25 . The current limiter arrangement of claim 18 , further comprising current limiting devices arranged between the first and the second terminal, wherein each current limiting device includes a substrate having a substrate surface area and a substrate thickness, and a superconducting section arranged on the substrate and thermally coupled to the substrate thereby covering a coupling surface area on the substrate, wherein each of the superconducting sections has a critical current value, and the substrate surface areas, the substrate thicknesses, and/or the coupling surface areas are implemented as a function of the critical current values. 26 . The current limiter arrangement of claim 18 , further comprising a housing for a coolant liquid, wherein the coolant fluid pass around the current limiting devices. 27 . The current limiter arrangement of claim 18 , wherein in at least one of the current limiting devices the substrate and the superconducting section is a layered structure. 28 . The current limiter arrangement of claim 18 , wherein in at least one of the current limiting devices the superconducting section comprises a buffer layer, a superconducting layer, and/or a protective layer. 29 . The current limiter arrangement of claim 18 , wherein the substrate comprises an electrically isolating material to dissipate heat from the superconducting section into a cooling liquid. 30 . A method for manufacturing a current limiter arrangement, comprising: arranging a plurality of current limiting devices between a first and a second terminal, wherein the current limiting devices each include a substrate having a substrate surface area and a substrate thickness, and a superconducting section arranged on the substrate and thermally coupled to the substrate thereby covering a coupling surface area on the substrate; electrically coupling the superconducting sections between the first and the second terminal, wherein each of the superconducting sections has a critical current value; adapting the substrate surface areas, the substrate thicknesses, and/or the coupling surface areas as a function of the critical current values. 31 . The method of claim 30 , further comprising: compensating a difference in recovery times of the current limiting devices by varying the substrate surface areas, the substrate thicknesses, and/or the coupling surface areas when the current limiter arrangement is operated with predetermined operational parameters. 32 . The method of claim 30 , wherein the current limiter arrangement is the current limiter arrangement including: a first current limiting device and a second current limiting device arranged between the first and the second terminal; the first and the second current limiting device each include a substrate having a substrate surface area and a substrate thickness, and include a superconducting section arranged on the substrate and thermally coupled to the substrate thereby covering a coupling surface area on the substrate; wherein each of the superconducting sections has a critical current value, and the substrate surface areas, the substrate thicknesses, and/or the coupling surface areas are implemented as a function of the critical current values. 33 . A current limiting device for limiting an electric current between a first and a second terminal comprising: a substrate having a substrate surface area and a substrate thickness; a superconducting section arranged on the substrate and thermally coupled to the substrate thereby covering a coupling surface area on the substrate; wherein the substrate longitudinally extends between the first and the second terminal, and wherein a width of the substrate extends beyond the coupling surface area and varies at least piecewise between the first and the second terminal. 34 . The current limiting device of claim 33 , wherein the substrate comprises at least two substrate sections that are at least section-wise separated from one another by a gap, and wherein the superconducting section and/or a third substrate section partially bridges the gap.

Assignees

Inventors

Classifications

  • H02H9/023Primary

    Current limitation using superconducting elements · CPC title

  • Electricity · mapped topic

  • Electricity · mapped topic

  • H10N60/30Primary

    Devices switchable between superconducting and normal states · CPC title

  • Manufacture or treatment · CPC title

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What does patent US2017237252A1 cover?
A current limiter arrangement limiting an electric current between a first and a second terminal includes a first current limiting device and a second current limiting device arranged between the first and the second terminal. The first and the second current limiting device each include a substrate having a substrate surface area and a substrate thickness, and include a superconducting section…
Who is the assignee on this patent?
Furukawa Electric Co Ltd
What technology area does this patent fall under?
Primary CPC classification H02H9/023. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Aug 17 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).