Transceiver using technique for improvement of phase noise and switching of phase lock loop (pll)

US2017207807A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2017207807-A1
Application numberUS-201715478968-A
CountryUS
Kind codeA1
Filing dateApr 4, 2017
Priority dateMay 10, 2012
Publication dateJul 20, 2017
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A transceiver may include a reception (Rx) radio frequency (RF) part configured to process a received signal, a transmission (Tx) RF part configured to process a transmitted signal, and a phase lock loop (PLL) configured to provide a reception frequency to the reception RF part and provide a transmission frequency to the transmission RF part. The PLL may be controlled according to whether the reception RF part or the transmission RF part is on. In addition, a transceiver may include quenching waveform generator (QWGs) to control quenching waveforms of the RF parts corresponding to a plurality of antennas. The quenching waveforms may be generated respectively by VCOs operating at a same frequency. The QWGs may control the VCOs such that the quenching waveforms do not overlap.

First claim

Opening claim text (preview).

What is claimed is: 1 . A transceiver comprising: a first radio frequency (RF) part comprising; a first voltage controlled oscillator (VCO) configured to operate a frequency and generate an output envelope; and a first quenching waveform generator (QWG) configured generate a quenching waveform to control the output envelope of the first VCO; and a second RF part comprising; a second VCO configured to operated at the same frequency as the first VCO and generate an output envelope; and a second QWG configured to configured to generate a quenching waveform to control the second VCO that does that does not overlap in time with the quenching waveform generated by the first quenching waveform generator, wherein the output envelopes of the VCOs do not overlap and interference between VCOs is avoided. 2 . The transceiver of claim 1 , further comprising an antenna, wherein the first QWG is configured to control the first VCO and generate the quenching waveform of the first RF part corresponding to the antenna, and the second QWG is configured to control the second VCO and generate the quenching waveform of the second RF part corresponding to the antenna. 3 . The transceiver of claim 1 , further comprising a first antenna and a second antenna, wherein the first QWG is configured to control the quenching waveform of the first RF part corresponding to the first antenna, and the second QWG is configured to control the quenching waveform of the second RF part corresponding to the second antenna. 4 . The transceiver of claim 1 , wherein the first QWG and the second QWG are configured to control the point in time of oscillation of their corresponding VCOs by controlling a current input to their corresponding VCOs. 5 . The transceiver of claim 4 , wherein the first QWG and the second QWG are configured to control the point in time of oscillation of their corresponding VCOs to correspond to when a bias current of the corresponding VCOs is greater than a predetermined critical current. 6 . The transceiver of claim 1 , wherein the first QWG and the second QWG are configured to implement a guard time assigned between the quenching waveform of the first RF part and the quenching waveform of the second RF part to prevent an output envelope of the first VCO from interfering with an output envelope of the second VCO. 7 . The transceiver of claim 6 , wherein the guard time has a time value greater than a quenching delay caused by discharge of the first VCO or second VCO. 8 . A transceiver comprising: a plurality of antennas including a first antenna and a second antenna; a plurality of first quenching waveform generators (QWGs) configured to generate a quenching waveform of a first transmission radio frequency (Tx RF) part and a quenching waveform of a first reception RF (Rx RF) part corresponding to the first antenna; and a plurality of second QWGs configured to generate a quenching waveform of a second Tx RF part and a quenching waveform of a second Rx RF part corresponding to the second antenna, wherein the quenching waveforms control a plurality of voltage controlled oscillators (VCOs) operating at the same frequency, and the first QWGs and the second QWGs are configured to control the plurality of VCOs by generating quenching waveforms that do not overlap with each other. 9 . The transceiver of claim 8 , wherein the first QWGs and the second QWGs are configured to control a point of time of oscillation of corresponding VCOs by controlling a current input to the corresponding VCOs. 10 . The transceiver of claim 8 , wherein the first QWGs and the second QWGs are configured to implement a guard time assigned between the quenching waveforms to prevent an output of any one VCO among the plurality of VCOs from interfering with an output of any other of the plurality of VCOs. 11 . The transceiver of claim 10 , wherein the guard time has a time value greater than a quenching delay caused by discharge of the any one of the plurality of VCOs. 12 . A transceiver comprising: a plurality of antennas including a first antenna and a second antenna; a first radio frequency (RF) part including a first transmission RF part and a first reception RF part corresponding to the first antenna; and a second RF part including a second transmission RF part and a second reception RF part corresponding to the second antenna, wherein each of the first RF part and the second RF part comprises: a phase lock loop (PLL) configured to provide a reception frequency to a corresponding reception part and provide a transmission frequency to a corresponding transmission part, and to be controlled according to whether the corresponding reception part or the corresponding transmission part is turned on; a plurality of voltage controlled oscillators (VCOs) configured to operate at a same frequency; and a plurality of quenching waveform generators (QWGs) configured to generate a quenching waveform for a corresponding transmission part and a quenching waveform for a corresponding reception part to control operation of the VCOs such that the quenching waveforms do not overlap in time. 13 . The transceiver of claim 11 , wherein the QWGs are configured to control corresponding VCOs such that quenching waveforms for the corresponding transmission part and quenching waveforms for the corresponding reception part do not overlap in time.

Assignees

Inventors

Classifications

  • using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop · CPC title

  • concerning mainly the controlled oscillator of the loop · CPC title

  • H03B5/1215Primary

    the current source or degeneration circuit being in common to both transistors of the pair, e.g. a cross-coupled long-tailed pair · CPC title

  • the loop being adapted for reducing power consumption (H03L7/14 takes precedence) · CPC title

  • H04B1/38Primary

    Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving · CPC title

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What does patent US2017207807A1 cover?
A transceiver may include a reception (Rx) radio frequency (RF) part configured to process a received signal, a transmission (Tx) RF part configured to process a transmitted signal, and a phase lock loop (PLL) configured to provide a reception frequency to the reception RF part and provide a transmission frequency to the transmission RF part. The PLL may be controlled according to whether the r…
Who is the assignee on this patent?
Samsung Electronics Co Ltd, Sungkyunkwan Univ Found For Corp Collaboration
What technology area does this patent fall under?
Primary CPC classification H03B5/1215. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Jul 20 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).